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Message-ID: <9f53e647-7c38-435f-bc74-e4f417445830@linaro.org>
Date:   Tue, 17 Oct 2023 08:11:45 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 10/12] dt-bindings: usb: qcom,dwc3: Introduce flattened
 qcom,dwc3 binding
Content-Language: en-US
To:     Bjorn Andersson <quic_bjorande@quicinc.com>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Wesley Cheng <quic_wcheng@quicinc.com>,
        Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
        Felipe Balbi <balbi@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>
Cc:     linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        Johan Hovold <johan@kernel.org>,
        Krishna Kurapati PSSNV <quic_kriskura@quicinc.com>
References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com>
 <20231016-dwc3-refactor-v1-10-ab4a84165470@quicinc.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Autocrypt: addr=krzysztof.kozlowski@linaro.org; keydata=
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In-Reply-To: <20231016-dwc3-refactor-v1-10-ab4a84165470@quicinc.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit
Precedence: bulk

On 17/10/2023 05:11, Bjorn Andersson wrote:
> The Qualcomm USB block consists of three intertwined parts, the XHCI,
> the DWC3 core and the Qualcomm DWC3 glue. The three parts can not be
> operated independently, but the binding was for historical reasons split
> to mimic the Linux driver implementation.
> 
> The split binding also makes it hard to alter the implementation, as
> properties and resources are split between the two nodes, in some cases
> with some duplication.
> 
> Introduce a new binding, with a single representation of the whole USB
> block in one node.
> 
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
>  .../devicetree/bindings/usb/qcom,dwc3.yaml         | 482 +++++++++++++++++++++
>  .../devicetree/bindings/usb/snps,dwc3.yaml         |  14 +-
>  2 files changed, 491 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> new file mode 100644
> index 000000000000..cb50261c6a36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> @@ -0,0 +1,482 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SuperSpeed DWC3 USB SoC controller
> +
> +maintainers:
> +  - Wesley Cheng <quic_wcheng@quicinc.com>
> +
> +select:
> +  properties:
> +    compatible:
> +      items:
> +        - enum:
> +            - qcom,ipq4019-dwc3
> +            - qcom,ipq5018-dwc3
> +            - qcom,ipq5332-dwc3
> +            - qcom,ipq6018-dwc3
> +            - qcom,ipq8064-dwc3
> +            - qcom,ipq8074-dwc3
> +            - qcom,ipq9574-dwc3
> +            - qcom,msm8953-dwc3
> +            - qcom,msm8994-dwc3
> +            - qcom,msm8996-dwc3
> +            - qcom,msm8998-dwc3
> +            - qcom,qcm2290-dwc3
> +            - qcom,qcs404-dwc3
> +            - qcom,sa8775p-dwc3
> +            - qcom,sc7180-dwc3
> +            - qcom,sc7280-dwc3
> +            - qcom,sc8180x-dwc3
> +            - qcom,sc8280xp-dwc3
> +            - qcom,sc8280xp-dwc3-mp
> +            - qcom,sdm660-dwc3
> +            - qcom,sdm670-dwc3
> +            - qcom,sdm845-dwc3
> +            - qcom,sdx55-dwc3
> +            - qcom,sdx65-dwc3
> +            - qcom,sdx75-dwc3
> +            - qcom,sm4250-dwc3
> +            - qcom,sm6115-dwc3
> +            - qcom,sm6125-dwc3
> +            - qcom,sm6350-dwc3
> +            - qcom,sm6375-dwc3
> +            - qcom,sm8150-dwc3
> +            - qcom,sm8250-dwc3
> +            - qcom,sm8350-dwc3
> +            - qcom,sm8450-dwc3
> +            - qcom,sm8550-dwc3

This enum could be replaced with '{}'. Alternatively, drop enum entire
select replaced with:
- contains
  - items:
      - const: qcom,dwc3
      - const: snps,dwc3


> +        - const: qcom,dwc3
> +        - const: snps,dwc3
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - qcom,ipq4019-dwc3
> +          - qcom,ipq5018-dwc3
> +          - qcom,ipq5332-dwc3
> +          - qcom,ipq6018-dwc3
> +          - qcom,ipq8064-dwc3
> +          - qcom,ipq8074-dwc3
> +          - qcom,ipq9574-dwc3
> +          - qcom,msm8953-dwc3
> +          - qcom,msm8994-dwc3
> +          - qcom,msm8996-dwc3
> +          - qcom,msm8998-dwc3
> +          - qcom,qcm2290-dwc3
> +          - qcom,qcs404-dwc3
> +          - qcom,sa8775p-dwc3
> +          - qcom,sc7180-dwc3
> +          - qcom,sc7280-dwc3
> +          - qcom,sc8180x-dwc3
> +          - qcom,sc8280xp-dwc3
> +          - qcom,sc8280xp-dwc3-mp
> +          - qcom,sdm660-dwc3
> +          - qcom,sdm670-dwc3
> +          - qcom,sdm845-dwc3
> +          - qcom,sdx55-dwc3
> +          - qcom,sdx65-dwc3
> +          - qcom,sdx75-dwc3
> +          - qcom,sm4250-dwc3
> +          - qcom,sm6115-dwc3
> +          - qcom,sm6125-dwc3
> +          - qcom,sm6350-dwc3
> +          - qcom,sm6375-dwc3
> +          - qcom,sm8150-dwc3
> +          - qcom,sm8250-dwc3
> +          - qcom,sm8350-dwc3
> +          - qcom,sm8450-dwc3
> +          - qcom,sm8550-dwc3
> +      - const: qcom,dwc3
> +      - const: snps,dwc3
> +
> +  reg:
> +    description: Offset and length of register set for QSCRATCH wrapper
> +    maxItems: 1
> +
> +  power-domains:
> +    description: specifies a phandle to PM domain provider node

Drop description

> +    maxItems: 1
> +
> +  required-opps:
> +    maxItems: 1
> +
> +  clocks:
> +    description: |
> +      Several clocks are used, depending on the variant. Typical ones are::
> +       - cfg_noc:: System Config NOC clock.
> +       - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
> +                60MHz for HS operation.
> +       - iface:: System bus AXI clock.
> +       - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
> +                 power mode (U3).
> +       - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
> +                     mode. Its frequency should be 19.2MHz.
> +    minItems: 1
> +    maxItems: 9
> +
> +  clock-names:
> +    minItems: 1
> +    maxItems: 9
> +
> +  resets:
> +    maxItems: 1
> +
> +  interconnects:
> +    maxItems: 2
> +
> +  interconnect-names:
> +    items:
> +      - const: usb-ddr
> +      - const: apps-usb
> +
> +  interrupts:
> +    minItems: 2
> +    maxItems: 5
> +
> +  interrupt-names:
> +    minItems: 2
> +    maxItems: 5
> +
> +  qcom,select-utmi-as-pipe-clk:
> +    description:
> +      If present, disable USB3 pipe_clk requirement.
> +      Used when dwc3 operates without SSPHY and only
> +      HS/FS/LS modes are supported.
> +    type: boolean
> +
> +  wakeup-source: true
> +
> +# Required child node:

Drop


...

> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> index d81c2e849ca9..d6914b8cef6a 100644
> --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> @@ -44,14 +44,18 @@ properties:
>        It's either a single common DWC3 interrupt (dwc_usb3) or individual
>        interrupts for the host, gadget and DRD modes.
>      minItems: 1
> -    maxItems: 4
> +    maxItems: 5
>  
>    interrupt-names:
> -    minItems: 1
> -    maxItems: 4
>      oneOf:
> -      - const: dwc_usb3
> -      - items:
> +      - minItems: 1
> +        maxItems: 5
> +        items:
> +          - const: dwc_usb3
> +        additionalItems: true

This is not correct change. Before, one dwc_usb3 interrupt was combined
allowed, or a set of host+peripheral+otg+wakeup. Now, you allow combined
dwc_usb3 with anything.


Best regards,
Krzysztof