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Tue, 17 Oct 2023 01:00:01 -0700 (PDT) Date: Tue, 17 Oct 2023 13:29:52 +0530 From: Manivannan Sadhasivam To: Bjorn Helgaas Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com, robh@kernel.org, gustavo.pimentel@synopsys.com, jingoohan1@gmail.com, andersson@kernel.org, konrad.dybcio@linaro.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v2 1/2] PCI: dwc: Add host_post_init() callback Message-ID: <20231017075952.GC5274@thinkpad> References: <20231010155914.9516-2-manivannan.sadhasivam@linaro.org> <20231016205849.GA1225381@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231016205849.GA1225381@bhelgaas> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 17 Oct 2023 01:00:09 -0700 (PDT) On Mon, Oct 16, 2023 at 03:58:49PM -0500, Bjorn Helgaas wrote: > On Tue, Oct 10, 2023 at 09:29:13PM +0530, Manivannan Sadhasivam wrote: > > This callback can be used by the platform drivers to do configuration once > > all the devices are scanned. Like changing LNKCTL of all downstream devices > > to enable ASPM etc... > > > > Signed-off-by: Manivannan Sadhasivam > > --- > > drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++ > > drivers/pci/controller/dwc/pcie-designware.h | 1 + > > 2 files changed, 4 insertions(+) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > index a7170fd0e847..7991f0e179b2 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > @@ -502,6 +502,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) > > if (ret) > > goto err_stop_link; > > > > + if (pp->ops->host_post_init) > > + pp->ops->host_post_init(pp); > > I know we talked about this a little bit in the context of enabling > ASPM for devices below qcom 1.9.0 controllers at > https://lore.kernel.org/r/20231011050058.GC3508@thinkpad > > But I didn't realize at the time that this callback adds a fundamental > difference between devices present at boot-time (these devices can be > affected by this callback) and any devices hot-added later (we never > run this callback again, so anything done by .host_post_init() never > applies to them). > > We merged this for now, and it helps enable ASPM for builtin devices > on qcom, but I don't feel good about this from a larger DWC > perspective. If other drivers use this and they support hot-add, I > think we're going to have problems. > If someone is going to add same ASPM code in host_post_init() callback, they will most likely aware of the hotplug issue. I see this as an interim solution overall and we should fix the PCI core to handle this. But I do not see any straightforward way to enable ASPM by default in PCI core as the misbehaving devices can pull the system down (atleast in some x86 cases). - Mani -- மணிவண்ணன் சதாசிவம்