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From: Oliver Upton To: Raghavendra Rao Ananta Cc: Sebastian Ott , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Message-ID: References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-8-rananta@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 17 Oct 2023 11:11:28 -0700 (PDT) On Tue, Oct 17, 2023 at 10:25:50AM -0700, Raghavendra Rao Ananta wrote: > On Tue, Oct 17, 2023 at 10:09 AM Oliver Upton wrote: > > > > On Tue, Oct 17, 2023 at 09:58:08AM -0700, Raghavendra Rao Ananta wrote: > > > On Mon, Oct 16, 2023 at 10:52 PM Oliver Upton wrote: > > > > > > > > On Mon, Oct 16, 2023 at 02:35:52PM -0700, Raghavendra Rao Ananta wrote: > > > > > > > > [...] > > > > > > > > > > What's the point of doing this in the first place? The implementation of > > > > > > kvm_vcpu_read_pmcr() is populating PMCR_EL0.N using the VM-scoped value. > > > > > > > > > > > I guess originally the change replaced read_sysreg(pmcr_el0) with > > > > > kvm_vcpu_read_pmcr(vcpu) to maintain consistency with others. > > > > > But if you and Sebastian feel that it's an overkill and directly > > > > > getting the value via vcpu->kvm->arch.pmcr_n is more readable, I'm > > > > > happy to make the change. > > > > > > > > No, I'd rather you delete the line where PMCR_EL0.N altogether. > > > > reset_pmcr() tries to initialize the field, but your > > > > kvm_vcpu_read_pmcr() winds up replacing it with pmcr_n. > > > > > > > I didn't get this comment. We still do initialize pmcr, but using the > > > pmcr.n read via kvm_vcpu_read_pmcr() instead of the actual system > > > register. > > > > You have two bits of code trying to do the exact same thing: > > > > 1) reset_pmcr() initializes __vcpu_sys_reg(vcpu, PMCR_EL0) with the N > > field set up. > > > > 2) kvm_vcpu_read_pmcr() takes whatever is in __vcpu_sys_reg(vcpu, PMCR_EL0), > > *masks out* the N field and re-initializes it with vcpu->kvm->arch.pmcr_n > > > > Why do you need (1) if you do (2)? > > > Okay, I see what you mean now. In that case, let reset_pmcr(): > - Initialize 'pmcr' using vcpu->kvm->arch.pmcr_n > - Set ARMV8_PMU_PMCR_LC as appropriate in 'pmcr' > - Write 'pmcr' to the vcpu reg > > From here on out, kvm_vcpu_read_pmcr() would read off of this > initialized value, unless of course, userspace updates the pmcr.n. > Is this the flow that you were suggesting? Just squash this in: diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index d1db1f292645..7b54c7843bef 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -743,10 +743,8 @@ static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { - u64 pmcr; + u64 pmcr = 0; - /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ - pmcr = kvm_vcpu_read_pmcr(vcpu) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); if (!kvm_supports_32bit_el0()) pmcr |= ARMV8_PMU_PMCR_LC; -- Thanks, Oliver