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[2620:137:e000::3:1]) by mx.google.com with ESMTPS id h16-20020a17090ac39000b002791bfc67bdsi169714pjt.41.2023.10.17.16.15.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 16:15:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@mailbox.org header.s=mail20150812 header.b=HxtKZKLs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=mailbox.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id A9AD080E608E; Tue, 17 Oct 2023 16:14:59 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232568AbjJQXOy (ORCPT + 99 others); Tue, 17 Oct 2023 19:14:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229459AbjJQXOx (ORCPT ); Tue, 17 Oct 2023 19:14:53 -0400 Received: from mout-p-102.mailbox.org (mout-p-102.mailbox.org [80.241.56.152]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C41AC4; Tue, 17 Oct 2023 16:14:50 -0700 (PDT) Received: from smtp2.mailbox.org (smtp2.mailbox.org [10.196.197.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-102.mailbox.org (Postfix) with ESMTPS id 4S98vV5cBmz9sXg; Wed, 18 Oct 2023 01:14:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1697584486; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Cmtq4fWj5Rl8hlT+/wDd4j3/Uz9lprd8zFd/8pF1nPY=; b=HxtKZKLsmXiXc3pFtY43GBAEzKy09Otq7ByZ3x2MMcWctFaedNZJxCMReVUq0+VgnYehlx J99ULnk1lQtml6cJdQJWZNxnlVbuUgDNH6GRJ1oRd5sL6mhjusK4/7gEBNpN7OuPIbgfOW o7WRjdk5MGSNNH/UzePyoyKGqQqVtAW2YNVsu8LUoCTxm0IlWHal/iCL5MG0BMQqETyN4A 8JhnRsCBX8iiDrAtM3C9fN11lKtxen6f9lQbS8exoYMRoRNzYkw2GquORS6/iAPC9ChEAn t0q7yqdgM+klxvv0EcFgZqTq4ZpDCeqV9jjt0Y7hFUr6LIsUgAQJ3LLH1GqCwA== Date: Wed, 18 Oct 2023 01:14:43 +0200 From: Erhard Furtner To: "Aneesh Kumar K.V" Cc: "Matthew Wilcox (Oracle)" , Juergen Gross , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-sparc@vger.kernel.org, David Woodhouse Subject: Re: [PATCH 0/2] Allow nesting of lazy MMU mode Message-ID: <20231018011443.3bd8b366@yea> In-Reply-To: <875y35zswo.fsf@linux.ibm.com> References: <20231012195415.282357-1-willy@infradead.org> <20231013154220.02fb2e6d@yea> <875y35zswo.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-MBO-RS-ID: 99c3693f2065b8fe824 X-MBO-RS-META: dcbcmyejoc5m4xaoafkbxmyubyh5pkqz X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Tue, 17 Oct 2023 16:14:59 -0700 (PDT) On Tue, 17 Oct 2023 11:34:23 +0530 "Aneesh Kumar K.V" wrote: > ie, we can do something like below. The change also make sure we call > set_pte_filter on all the ptes we are setting via set_ptes(). I haven't > sent this as a proper patch because we still are not able to fix the > issue Erhard reported. > > diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c > index 3ba9fe411604..95ab20cca2da 100644 > --- a/arch/powerpc/mm/pgtable.c > +++ b/arch/powerpc/mm/pgtable.c > @@ -191,28 +191,35 @@ void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep, > pte_t pte, unsigned int nr) > { > /* > - * Make sure hardware valid bit is not set. We don't do > - * tlb flush for this update. > + * We don't need to call arch_enter/leave_lazy_mmu_mode() > + * because we expect set_ptes to be only be used on not present > + * and not hw_valid ptes. Hence there is not translation cache flush > + * involved that need to be batched. > */ > - VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep)); > + for (;;) { > > - /* Note: mm->context.id might not yet have been assigned as > - * this context might not have been activated yet when this > - * is called. > - */ > - pte = set_pte_filter(pte); > + /* > + * Make sure hardware valid bit is not set. We don't do > + * tlb flush for this update. > + */ > + VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep)); > > - /* Perform the setting of the PTE */ > - arch_enter_lazy_mmu_mode(); > - for (;;) { > + /* Note: mm->context.id might not yet have been assigned as > + * this context might not have been activated yet when this > + * is called. > + */ > + pte = set_pte_filter(pte); > + > + /* Perform the setting of the PTE */ > __set_pte_at(mm, addr, ptep, pte, 0); > if (--nr == 0) > break; > ptep++; > - pte = __pte(pte_val(pte) + (1UL << PTE_RPN_SHIFT)); > addr += PAGE_SIZE; > + /* increment the pfn */ > + pte = __pte(pte_val(pte) + PAGE_SIZE); > + > } > - arch_leave_lazy_mmu_mode(); > } > > void unmap_kernel_page(unsigned long va) Was this a new version of the patch for me to test? Sorry for asking but this was a bit unclear to me. In any case I tried it on top of v6.6-rc6 and it did not help with the issue I reported. Regards, Erhard