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Date:   Wed, 18 Oct 2023 10:04:02 +0200
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Subject: Re: [PATCH] staging: rts5208: Replace delay function.
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To:     kenechukwu maduechesi <maduechesik@gmail.com>
CC:     <outreachy@lists.linux.dev>, <shreeya.patel23498@gmail.com>,
        "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
        <linux-staging@lists.linux.dev>, <linux-kernel@vger.kernel.org>
References: <20231018004300.GA3189@ubuntu>
From:   Karolina Stolarek <karolina.stolarek@intel.com>
Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298
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On 18.10.2023 03:03, kenechukwu maduechesi wrote:
> Replace udelay() with usleep_range() for more precise delay handling.
> 
> Reported by checkpatch:
> 
> CHECK: usleep_range is preferred over udelay

Have you tried to compile your patch? This is something you should do 
before sending it to the mailing list.

All the best,
Karolina

> 
> Signed-off-by: kenechukwu maduechesi <maduechesik@gmail.com>
> ---
>   drivers/staging/rts5208/sd.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/staging/rts5208/sd.c b/drivers/staging/rts5208/sd.c
> index 74c4f476b3a4..059f99b0a727 100644
> --- a/drivers/staging/rts5208/sd.c
> +++ b/drivers/staging/rts5208/sd.c
> @@ -865,7 +865,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>   						     PHASE_CHANGE);
>   			if (retval)
>   				return retval;
> -			udelay(50);
> +			usleep_range(50);
>   			retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
>   						     PHASE_CHANGE |
>   						     PHASE_NOT_RESET |
> @@ -877,14 +877,14 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>   						     CHANGE_CLK, CHANGE_CLK);
>   			if (retval)
>   				return retval;
> -			udelay(50);
> +			usleep_range(50);
>   			retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
>   						     PHASE_NOT_RESET |
>   						     sample_point);
>   			if (retval)
>   				return retval;
>   		}
> -		udelay(100);
> +		usleep_range(100);
>   
>   		rtsx_init_cmd(chip);
>   		rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
> @@ -918,7 +918,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
>   				return retval;
>   		}
>   
> -		udelay(50);
> +		usleep_range(50);
>   	}
>   
>   	retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
> @@ -1416,7 +1416,7 @@ static int sd_wait_data_idle(struct rtsx_chip *chip)
>   			retval = STATUS_SUCCESS;
>   			break;
>   		}
> -		udelay(100);
> +		usleep_range(100);
>   	}
>   	dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
>