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[23.128.96.32]) by mx.google.com with ESMTPS id ck3-20020a056a02090300b00588fdd9504bsi2034071pgb.858.2023.10.18.04.27.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 04:27:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=hDSJHTw6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id CEDFB80D5F90; Wed, 18 Oct 2023 04:27:00 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229908AbjJRL0m (ORCPT + 99 others); Wed, 18 Oct 2023 07:26:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229690AbjJRL0l (ORCPT ); Wed, 18 Oct 2023 07:26:41 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE392113 for ; Wed, 18 Oct 2023 04:26:37 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-32d834ec222so5990442f8f.0 for ; Wed, 18 Oct 2023 04:26:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1697628396; x=1698233196; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=Fo7B+cdiTA7QkXzogWs+Pqnw9GSLWygwDRl43SgG4dc=; b=hDSJHTw6KFJp97jETOV2GRIONRsn/wO2k4STSHYThukIZ/pfWMd69mKW95WwnHdarh 03pqqrCcvOaeuueBFXLm2EPg8XipZhzRZwg82RzdmFTiqmcFRpWQOlJLscMwQsc50zHo EnRgCZ96YMbCA6QjZT6zJWJnDpb0EK3QtWX6qQPlMw7VTCBcgpiqmUhI3DB5kaiMq0OK QO7WqVqcXy8H/CMxdqhuvtP3hJRdXRoTaZC7w/5Fxmb6lJ8y3TDcKXZxyKvka0A+0GJG D1N0SB8lAgKn7ZX/DaRqGRl5XuuTIi+FojQtwVk7OpgBh/sf2jL36trqBQ4UkqoYXLHH e35A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697628396; x=1698233196; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Fo7B+cdiTA7QkXzogWs+Pqnw9GSLWygwDRl43SgG4dc=; b=BfTs3bloBKJ4HrDPA8f9yL/qH6auwcbThcIP8cEiPcZTR71FYzVmtpwTv42BQOmjP5 Px/Amti0xsYAIyj3ZHpH037exhj0Zxm8RmvY5roS3vR1XTWEpCUWFtAt4itH2f/zJh+l vlQQMnldlFFcxpGf7fkHKBDV2RRS+avhqL+kPAtF81bupilsQl8I/+ehM1V+8EYKWUsk YqFSz9UKFk2iECLwIfuLSHeQaln5jND/x+E2psotYZEBkuaWohq6rdu/XSYn8IYtE1Fj YHCWKVHarRuib61z3SSTq3XbF+XsozWkeqaMaBNACG5nHyYY91H/3jTx1iuUf6S4DwOQ giSA== X-Gm-Message-State: AOJu0YwAyApbzXLqyRkaKzw7SDPukYgmzUdy75UbATttStXqKzkHitFn r6aPGm9ucNI3gC05q5MtlNvKgccWO/szezU9uUh9aw== X-Received: by 2002:a5d:58da:0:b0:32d:b051:9a2b with SMTP id o26-20020a5d58da000000b0032db0519a2bmr4179536wrf.2.1697628396063; Wed, 18 Oct 2023 04:26:36 -0700 (PDT) MIME-Version: 1.0 References: <20230911131224.61924-1-alexghiti@rivosinc.com> <20230911131224.61924-2-alexghiti@rivosinc.com> <2047b2c2-bf37-4c02-9297-d89f95863ed5@sifive.com> In-Reply-To: <2047b2c2-bf37-4c02-9297-d89f95863ed5@sifive.com> From: Alexandre Ghiti Date: Wed, 18 Oct 2023 13:26:25 +0200 Message-ID: Subject: Re: [PATCH v4 1/4] riscv: Improve flush_tlb() To: Samuel Holland Cc: Andrew Jones , Will Deacon , "Aneesh Kumar K . V" , Andrew Morton , Nick Piggin , Peter Zijlstra , Mayuresh Chitale , Vincent Chen , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 18 Oct 2023 04:27:01 -0700 (PDT) Hi Samuel, On Mon, Oct 9, 2023 at 7:53=E2=80=AFPM Samuel Holland wrote: > > On 2023-09-11 8:12 AM, Alexandre Ghiti wrote: > > For now, flush_tlb() simply calls flush_tlb_mm() which results in a > > s/flush_tlb/tlb_flush/ here and in the subject. > > Otherwise: > Reviewed-by: Samuel Holland Ahah good catch, thanks for that and the RB! Alex > > > flush of the whole TLB. So let's use mmu_gather fields to provide a mor= e > > fine-grained flush of the TLB. > > > > Signed-off-by: Alexandre Ghiti > > Reviewed-by: Andrew Jones > > --- > > arch/riscv/include/asm/tlb.h | 8 +++++++- > > arch/riscv/include/asm/tlbflush.h | 3 +++ > > arch/riscv/mm/tlbflush.c | 7 +++++++ > > 3 files changed, 17 insertions(+), 1 deletion(-) > > > > diff --git a/arch/riscv/include/asm/tlb.h b/arch/riscv/include/asm/tlb.= h > > index 120bcf2ed8a8..1eb5682b2af6 100644 > > --- a/arch/riscv/include/asm/tlb.h > > +++ b/arch/riscv/include/asm/tlb.h > > @@ -15,7 +15,13 @@ static void tlb_flush(struct mmu_gather *tlb); > > > > static inline void tlb_flush(struct mmu_gather *tlb) > > { > > - flush_tlb_mm(tlb->mm); > > +#ifdef CONFIG_MMU > > + if (tlb->fullmm || tlb->need_flush_all) > > + flush_tlb_mm(tlb->mm); > > + else > > + flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, > > + tlb_get_unmap_size(tlb)); > > +#endif > > } > > > > #endif /* _ASM_RISCV_TLB_H */ > > diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm= /tlbflush.h > > index a09196f8de68..f5c4fb0ae642 100644 > > --- a/arch/riscv/include/asm/tlbflush.h > > +++ b/arch/riscv/include/asm/tlbflush.h > > @@ -32,6 +32,8 @@ static inline void local_flush_tlb_page(unsigned long= addr) > > #if defined(CONFIG_SMP) && defined(CONFIG_MMU) > > void flush_tlb_all(void); > > void flush_tlb_mm(struct mm_struct *mm); > > +void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, > > + unsigned long end, unsigned int page_size); > > void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr); > > void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, > > unsigned long end); > > @@ -52,6 +54,7 @@ static inline void flush_tlb_range(struct vm_area_str= uct *vma, > > } > > > > #define flush_tlb_mm(mm) flush_tlb_all() > > +#define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all() > > #endif /* !CONFIG_SMP || !CONFIG_MMU */ > > > > /* Flush a range of kernel pages */ > > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > > index 77be59aadc73..fa03289853d8 100644 > > --- a/arch/riscv/mm/tlbflush.c > > +++ b/arch/riscv/mm/tlbflush.c > > @@ -132,6 +132,13 @@ void flush_tlb_mm(struct mm_struct *mm) > > __flush_tlb_range(mm, 0, -1, PAGE_SIZE); > > } > > > > +void flush_tlb_mm_range(struct mm_struct *mm, > > + unsigned long start, unsigned long end, > > + unsigned int page_size) > > +{ > > + __flush_tlb_range(mm, start, end - start, page_size); > > +} > > + > > void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) > > { > > __flush_tlb_range(vma->vm_mm, addr, PAGE_SIZE, PAGE_SIZE); >