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[23.128.96.35]) by mx.google.com with ESMTPS id l18-20020a170902d35200b001c470c5906bsi511642plk.221.2023.10.18.12.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 12:34:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=jNmOSKUx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 0C6CB80D6AD8; Wed, 18 Oct 2023 12:33:44 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229768AbjJRTdf (ORCPT + 99 others); Wed, 18 Oct 2023 15:33:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbjJRTdd (ORCPT ); Wed, 18 Oct 2023 15:33:33 -0400 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3AC9109 for ; Wed, 18 Oct 2023 12:33:31 -0700 (PDT) Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-53e16f076b3so91597a12.0 for ; Wed, 18 Oct 2023 12:33:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697657610; x=1698262410; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=m1tU0gAsvo99sH0ntf3CjZbasv525nBRbJ+XTXDklbo=; b=jNmOSKUxio7Q6kK8qjZW0HdTJn0b78TQIDgshy2n482jkfNruU1HplrWR8kymuzY6m dACY/qgLSLIBlGAjNJs3azlKipYJlYZq76e4lbfRysvfVK23e3T1kexWo4PzqXsZ2iLO rLIWhb3G5DxcFcpTFzsYMRtK3O2SxvaIojC/J+1zAObNvpes7g+l0PF/87wQSyFkJD6l 3tMj7LpiXUyAJAPrtjzv7I6X6QJB2r5pMOFwkAI39s+JyOrC62VxSqarIUd/lYEp9i75 eRyEm2zJ3s2sIKCLZJm/yyFSXPYR3tchSCAV29iY4zInI+0KxGD4Z11F4MZQOghwCxgU UbmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697657610; x=1698262410; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m1tU0gAsvo99sH0ntf3CjZbasv525nBRbJ+XTXDklbo=; b=mOfPdjQgfhchtDtJSiPCqFFtalmB7ID14US7NP2hKDuzIrRsKwRpE1hbL0UTMmtcnr sK5dq6BVCNAqanJrNof/bRtYjOWUe/b8hCuecjhXTKGBC28PgtYLSXzxv3srmgN8IRZa cidQIBM/rcMkt/o6SlZtX2SL8ilkhuSDn6qwjlcX+2AgfgsdJqAV+3zEqrDPgv8qSTb1 9FlZ60zJw4vcloLAH+pAwql7n8/4qNzfAWhi1lwkCfCV5OfNaD4xvS9uDp+tGcGetJfv GBr++NWgrPbSOSCIi7D0i7Vl8wcQOru1VEhaPcegSig9f4Lyc2C13tqoYhNbY8iIl/9D tLrQ== X-Gm-Message-State: AOJu0Ywf66JKBpKTQNnM/rE+lIdwXmEf23lrHXfxoVReSvVkWXg9usYn LjriX73SVBqnZyxR1s+X6WeUi+VSJER3cj+i4s4= X-Received: by 2002:a05:6402:524a:b0:53e:264d:be1f with SMTP id t10-20020a056402524a00b0053e264dbe1fmr436781edd.2.1697657609825; Wed, 18 Oct 2023 12:33:29 -0700 (PDT) MIME-Version: 1.0 References: <20231010164234.140750-1-ubizjak@gmail.com> <0617BB2F-D08F-410F-A6EE-4135BB03863C@vmware.com> <7D77A452-E61E-4B8B-B49C-949E1C8E257C@vmware.com> <9F926586-20D9-4979-AB7A-71124BBAABD3@vmware.com> <3F9D776E-AD7E-4814-9E3C-508550AD9287@vmware.com> <28B9471C-4FB0-4AB0-81DD-4885C3645E95@vmware.com> In-Reply-To: From: Uros Bizjak Date: Wed, 18 Oct 2023 21:33:18 +0200 Message-ID: Subject: Re: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() To: Linus Torvalds Cc: Nadav Amit , "the arch/x86 maintainers" , Linux Kernel Mailing List , Andy Lutomirski , Brian Gerst , Denys Vlasenko , "H . Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Josh Poimboeuf , Nick Desaulniers Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 18 Oct 2023 12:33:44 -0700 (PDT) On Wed, Oct 18, 2023 at 8:26=E2=80=AFPM Uros Bizjak wro= te: > > On Wed, Oct 18, 2023 at 8:16=E2=80=AFPM Linus Torvalds > wrote: > > > > On Wed, 18 Oct 2023 at 11:08, Uros Bizjak wrote: > > > > > > But loads from non-const memory work like the above. > > > > Yes, I'm certainly ok with the move to use plain loads from __seg_gs > > for the percpu accesses. If they didn't honor the memory clobber, we > > could never use it at all. > > > > I was just saying that the 'const' alias trick isn't useful for > > anything else than 'current', because everything else needs to at > > least honor our existing barriers. > > FYI, smp_processor_id() is implemented as: > > #define __smp_processor_id() __this_cpu_read(pcpu_hot.cpu_number) > > where __this_* forces volatile access which disables CSE. > > *If* the variable is really stable, then it should use __raw_cpu_read. > Both, __raw_* and __this_* were recently (tip/percpu branch) > implemented for SEG_SUPPORT as: This pach works for me: --cut here-- diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index 4fab2ed454f3..6eda4748bf64 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -141,8 +141,7 @@ __visible void smp_call_function_single_interrupt(struct pt_regs *r); * This function is needed by all SMP systems. It must _always_ be valid * from the initial startup. */ -#define raw_smp_processor_id() this_cpu_read(pcpu_hot.cpu_number) -#define __smp_processor_id() __this_cpu_read(pcpu_hot.cpu_number) +#define raw_smp_processor_id() raw_cpu_read(pcpu_hot.cpu_number) #ifdef CONFIG_X86_32 extern int safe_smp_processor_id(void); --cut here-- But removes merely 10 reads from 3219. BTW: I also don't understand the comment from include/linux/smp.h: /* * Allow the architecture to differentiate between a stable and unstable re= ad. * For example, x86 uses an IRQ-safe asm-volatile read for the unstable but= a * regular asm read for the stable. */ #ifndef __smp_processor_id #define __smp_processor_id(x) raw_smp_processor_id(x) #endif All reads up to word size on x86 are atomic, so IRQ safe. asm-volatile is not some IRQ property, but prevents the compiler from CSE the asm and scheduling (moving) asm around too much. Uros.