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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id q12-20020a05600c2e4c00b0040648217f4fsm4089784wmf.39.2023.10.19.04.13.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Oct 2023 04:13:34 -0700 (PDT) Message-ID: <1cdc2a68-a1e8-4cf2-8a1a-899d14f8db80@linaro.org> Date: Thu, 19 Oct 2023 13:13:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/6] iommu/arm-smmu-qcom: Add support for TBUs Content-Language: en-US To: Georgi Djakov , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org Cc: devicetree@vger.kernel.org, andersson@kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_cgoldswo@quicinc.com, quic_sukadev@quicinc.com, quic_pdaly@quicinc.com, quic_sudaraja@quicinc.com, djakov@kernel.org References: <20231019021923.13939-1-quic_c_gdjako@quicinc.com> <20231019021923.13939-3-quic_c_gdjako@quicinc.com> From: Konrad Dybcio In-Reply-To: <20231019021923.13939-3-quic_c_gdjako@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 19 Oct 2023 04:13:49 -0700 (PDT) On 10/19/23 04:19, Georgi Djakov wrote: > The ARM MMU-500 implements a Translation Buffer Unit (TBU) for each > connected master besides a single TCU which controls and manages the > address translations. > > Allow the Qualcomm SMMU driver to probe for any TBU devices that can > provide additional debug features like triggering transactions, logging > outstanding transactions, snapshot capture etc. The most basic use-case > would be to get information from the TBUs and print it during a context > fault. > > Signed-off-by: Georgi Djakov > --- > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 12 ++++++++++++ > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h | 4 +++- > 2 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > index 7f52ac67495f..655c7f50ca84 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > @@ -1,12 +1,14 @@ > // SPDX-License-Identifier: GPL-2.0-only > /* > * Copyright (c) 2019, The Linux Foundation. All rights reserved. > + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved > */ > > #include > #include > #include > #include > +#include > #include > > #include "arm-smmu.h" > @@ -466,6 +468,16 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu, > qsmmu->smmu.impl = impl; > qsmmu->cfg = data->cfg; > > + /* Populate TBU devices if such are present in DT */ > + if (np && of_device_is_compatible(np, "arm,mmu-500")) { I'd say this can be unconditional. > + int ret; > + > + INIT_LIST_HEAD(&qsmmu->tbu_list); This list is unused. Konrad