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Thu, 19 Oct 2023 12:55:02 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B0D9F20043; Thu, 19 Oct 2023 12:55:02 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9095520040; Thu, 19 Oct 2023 12:55:00 +0000 (GMT) Received: from linux.vnet.ibm.com (unknown [9.126.150.29]) by smtpav01.fra02v.mail.ibm.com (Postfix) with SMTP; Thu, 19 Oct 2023 12:55:00 +0000 (GMT) Date: Thu, 19 Oct 2023 18:24:59 +0530 From: Srikar Dronamraju To: Peter Zijlstra Cc: Michael Ellerman , linuxppc-dev , Christophe Leroy , Nicholas Piggin , Rohan McLure , Valentin Schneider , Josh Poimboeuf , Mark Rutland , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/6] powerpc/smp: Enable Asym packing for cores on shared processor Message-ID: <20231019125459.GG2194132@linux.vnet.ibm.com> Reply-To: Srikar Dronamraju References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> <20231018163751.2423181-3-srikar@linux.vnet.ibm.com> <87v8b35ir3.fsf@mail.lhotse> <20231019074828.GM33217@noisy.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; 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Thu, 19 Oct 2023 06:09:51 -0700 (PDT) * Peter Zijlstra [2023-10-19 09:48:28]: > On Thu, Oct 19, 2023 at 03:38:40PM +1100, Michael Ellerman wrote: > > Srikar Dronamraju writes: > > > If there are shared processor LPARs, underlying Hypervisor can have more > > > virtual cores to handle than actual physical cores. > > > > > > Starting with Power 9, a core has 2 nearly independent thread groups. > > > > You need to be clearer here that you're talking about "big cores", not > > SMT4 cores as seen on bare metal systems. > > What is a 'big core' ? I'm thinking big.LITTLE, but I didn't think Power > went that route (yet?).. help? > Each independent thread group acts as a SMT4 core or a small core. A set of 2 thread groups form a SMT8 core aka big core. PowerVM aka pHYp schedules at a big core granularity So if we have 2 LPARS, each spanning 2 big cores, aka 16 CPUs, and if at somepoint, each LPAR has only 2 threads to run, we are exploring if we can run both the threads on just one big core, so that PhyP can schedule both LPARS at the same time and avoid having to switch/multiplex between these two LPARS. -- Thanks and Regards Srikar Dronamraju