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Thu, 19 Oct 2023 13:23:19 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3A68520043; Thu, 19 Oct 2023 13:23:19 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E6D4820040; Thu, 19 Oct 2023 13:23:16 +0000 (GMT) Received: from linux.vnet.ibm.com (unknown [9.126.150.29]) by smtpav04.fra02v.mail.ibm.com (Postfix) with SMTP; Thu, 19 Oct 2023 13:23:16 +0000 (GMT) Date: Thu, 19 Oct 2023 18:53:16 +0530 From: Srikar Dronamraju To: Peter Zijlstra Cc: Michael Ellerman , linuxppc-dev , Christophe Leroy , Nicholas Piggin , Rohan McLure , Valentin Schneider , Josh Poimboeuf , Mark Rutland , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 4/6] powerpc/smp: Disable MC domain for shared processor Message-ID: <20231019132316.GK2194132@linux.vnet.ibm.com> Reply-To: Srikar Dronamraju References: <20231018163751.2423181-1-srikar@linux.vnet.ibm.com> <20231018163751.2423181-5-srikar@linux.vnet.ibm.com> <87pm1b5ia7.fsf@mail.lhotse> <20231019075046.GN33217@noisy.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20231019075046.GN33217@noisy.programming.kicks-ass.net> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: hLt1dE7pvjhonyeBrPFQ5nky9dqm2vwL X-Proofpoint-ORIG-GUID: pvByYJRCDeZOjht1kAm1jmhRx7JhH8ny X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-19_11,2023-10-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 suspectscore=0 adultscore=0 mlxscore=0 bulkscore=0 phishscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310190114 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Thu, 19 Oct 2023 06:23:51 -0700 (PDT) * Peter Zijlstra [2023-10-19 09:50:46]: > On Thu, Oct 19, 2023 at 03:48:48PM +1100, Michael Ellerman wrote: > > Srikar Dronamraju writes: > > > Like L2-cache info, coregroup information which is used to determine MC > > > sched domains is only present on dedicated LPARs. i.e PowerVM doesn't > > > export coregroup information for shared processor LPARs. Hence disable > > > creating MC domains on shared LPAR Systems. > > > > > > Signed-off-by: Srikar Dronamraju > > > --- > > > arch/powerpc/kernel/smp.c | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c > > > index 498c2d51fc20..29da9262cb17 100644 > > > --- a/arch/powerpc/kernel/smp.c > > > +++ b/arch/powerpc/kernel/smp.c > > > @@ -1046,6 +1046,10 @@ static struct cpumask *cpu_coregroup_mask(int cpu) > > > > > > static bool has_coregroup_support(void) > > > { > > > + /* Coregroup identification not available on shared systems */ > > > + if (is_shared_processor()) > > > + return 0; > > > > That will catch guests running under KVM too right? Do we want that? > > Some KVM people use vcpu pinning and pass-through topology things, > slice-of-hardware or something like that. In that scenario you actively > do want this. > > I'm fairly clueless on when this is_shared_processor() gets to be true, > so that might already be dealt with.. Dedicated LPARs are like pinned VM instances. There is a one-to-one mapping between the Physical core and the virtual core. On Shared LPARs are unlike regular unpinned VM instances. The Hypervisor has the flexibility to schedule the virtual core on different Physical core based on the availability. And like regular VMs, Shared LPARs also support overcommiting i.e there can be more virtual cores than Physical cores. So Hypervisor takes care of switching the cores based on its entitlement. Hence On Shared LPARs, Hypervisors would like to keep the Hemisphere locality of the cores transparent to the OS. -- Thanks and Regards Srikar Dronamraju