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Peter Anvin" , Thomas Gleixner , Josh Poimboeuf , Nick Desaulniers Subject: Re: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() Message-ID: <20231019181359.GA35308@noisy.programming.kicks-ass.net> References: <20231019085432.GQ33217@noisy.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Thu, 19 Oct 2023 11:14:44 -0700 (PDT) On Thu, Oct 19, 2023 at 10:04:56AM -0700, Linus Torvalds wrote: > So if you do > > seq = load_acquire(orig_seq); > load-data > > then that acquire actually makes that first 'rmb' pointless. Acquire > already guarantees that all subsequent memory operations are ordered > wrt that read. > > And 'acquire' is likely faster than 'rmb' on sane modern architectures. > > On x86 it doesn't matter (rmb is a no-op, and all loads are acquires). > > But on arm64, for example, you can do a 'ld.acq' in one instruction > and you're done - while a rmb then ends up being a barrier (ok, the > asm mnemonics are horrible: it's not "ld.acq", it's "ldar", but > whatever - I like arm64 as an architecture, but I think they made the > standard assembly syntax pointlessly and actively hostile to humans). > > Of course then microarchitectures may end up doing basically the same > thing, but at least technically the 'load acquire' is likely more > targeted and more optimized. Sure, acquire should work fine here. > The second rmb is then harder to change, and that is going to stay an > rmb ( you could say "do an acquire on the last data load, but that > doesn't fit the sane locking semantics of a sequence lock). Wouldn't even work, acquire allows an earlier load to pass it. It only constraints later loads to not happen before. > Of course, then the percpu case doesn't care about the SMP ordering, > but it should still use an UP barrier to make sure things don't get > re-ordered. Relying on our "percpu_read()" ordering other reads around > it is *wrong*. I'm happy to put barrier() in there if it makes you feel better. But are you really saying this_cpu_read() should not imply READ_ONCE()? If so, we should probably go audit a ton of code :/