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Fri, 20 Oct 2023 06:06:50 -0700 (PDT) From: Punit Agrawal To: Jeremy Linton Cc: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, maz@kernel.org, anshuman.khandual@arm.com, krisman@suse.de, broonie@kernel.org, james.morse@arm.com, ionela.voinescu@arm.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/3] arm64: cpufeature: Display the set of cores with a feature In-Reply-To: <20231017052322.1211099-2-jeremy.linton@arm.com> (Jeremy Linton's message of "Tue, 17 Oct 2023 00:23:20 -0500") References: <20231017052322.1211099-1-jeremy.linton@arm.com> <20231017052322.1211099-2-jeremy.linton@arm.com> Date: Fri, 20 Oct 2023 14:06:49 +0100 Message-ID: <87ttqlo32u.fsf@gmail.com> User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 20 Oct 2023 06:07:27 -0700 (PDT) Jeremy Linton writes: > The AMU feature can be enabled on a subset of the cores in a system. > Because of that, it prints a message for each core as it is detected. > This becomes tedious when there are hundreds of cores. Instead, for > CPU features which can be enabled on a subset of the present cores, > lets wait until update_cpu_capabilities() and print the subset of cores > the feature was enabled on. > > Signed-off-by: Jeremy Linton > Reviewed-by: Ionela Voinescu > Tested-by: Ionela Voinescu > --- > arch/arm64/include/asm/cpufeature.h | 2 ++ > arch/arm64/kernel/cpufeature.c | 22 +++++++++++++--------- > 2 files changed, 15 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index 5bba39376055..19b4d001d845 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > /* > * CPU feature register tracking > @@ -380,6 +381,7 @@ struct arm64_cpu_capabilities { > * method is robust against being called multiple times. > */ > const struct arm64_cpu_capabilities *match_list; > + const struct cpumask *cpus; > }; > > static inline int cpucap_default_scope(const struct arm64_cpu_capabilities *cap) > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 444a73c2e638..2dd695fc3472 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -1944,8 +1944,6 @@ int get_cpu_with_amu_feat(void) > static void cpu_amu_enable(struct arm64_cpu_capabilities const *cap) > { > if (has_cpuid_feature(cap, SCOPE_LOCAL_CPU)) { > - pr_info("detected CPU%d: Activity Monitors Unit (AMU)\n", > - smp_processor_id()); > cpumask_set_cpu(smp_processor_id(), &amu_cpus); > > /* 0 reference values signal broken/disabled counters */ > @@ -2405,16 +2403,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > #endif /* CONFIG_ARM64_RAS_EXTN */ > #ifdef CONFIG_ARM64_AMU_EXTN > { > - /* > - * The feature is enabled by default if CONFIG_ARM64_AMU_EXTN=y. > - * Therefore, don't provide .desc as we don't want the detection > - * message to be shown until at least one CPU is detected to > - * support the feature. > - */ > + .desc = "Activity Monitors Unit (AMU)", > .capability = ARM64_HAS_AMU_EXTN, > .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, > .matches = has_amu, > .cpu_enable = cpu_amu_enable, > + .cpus = &amu_cpus, > ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, AMU, IMP) > }, > #endif /* CONFIG_ARM64_AMU_EXTN */ > @@ -2981,7 +2975,7 @@ static void update_cpu_capabilities(u16 scope_mask) > !caps->matches(caps, cpucap_default_scope(caps))) > continue; > > - if (caps->desc) > + if (caps->desc && !caps->cpus) > pr_info("detected: %s\n", caps->desc); > > __set_bit(caps->capability, system_cpucaps); > @@ -3330,6 +3324,7 @@ unsigned long cpu_get_elf_hwcap2(void) > > static void __init setup_system_capabilities(void) > { > + int i; > /* > * We have finalised the system-wide safe feature > * registers, finalise the capabilities that depend > @@ -3338,6 +3333,15 @@ static void __init setup_system_capabilities(void) > */ > update_cpu_capabilities(SCOPE_SYSTEM); > enable_cpu_capabilities(SCOPE_ALL & ~SCOPE_BOOT_CPU); > + > + for (i = 0; i < ARM64_NCAPS; i++) { > + const struct arm64_cpu_capabilities *caps = cpucap_ptrs[i]; > + > + if (caps && caps->cpus && caps->desc && > + cpumask_any(caps->cpus) < nr_cpu_ids) > + pr_info("detected: %s on CPU%*pbl\n", > + caps->desc, cpumask_pr_args(caps->cpus)); > + } > } > > void __init setup_cpu_features(void) Ah I replied to the previous version without realising there's a new one. This patch looks unchanged, so, fwiw, feel free to add Reviewed-by: Punit Agrawal Tested-by: Punit Agrawal Thanks, Punit