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Date:   Sat, 21 Oct 2023 00:36:39 +0200
From:   Robert Richter <rrichter@amd.com>
To:     Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc:     Davidlohr Bueso <dave@stgolabs.net>,
        Dave Jiang <dave.jiang@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
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        Ben Widawsky <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>,
        linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
        Bjorn Helgaas <bhelgaas@google.com>,
        Terry Bowman <terry.bowman@amd.com>
Subject: Re: [PATCH v12 10/20] cxl/pci: Introduce config option PCIEAER_CXL
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References: <20231018171713.1883517-1-rrichter@amd.com>
 <20231018171713.1883517-11-rrichter@amd.com>
 <20231019153045.000038cc@Huawei.com>
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Jon,

On 19.10.23 15:30:45, Jonathan Cameron wrote:
> On Wed, 18 Oct 2023 19:17:03 +0200
> Robert Richter <rrichter@amd.com> wrote:
> 
> > CXL error handling depends on AER.
> > 
> > Introduce config option PCIEAER_CXL in preparation of the AER dport
> > error handling. Also, introduce the stub function
> > devm_cxl_setup_parent_dport() to setup dports.
> > 
> > This is in preparation of follow on patches.
> > 
> > Note the Kconfg part of the option is added in a later patch to enable
> > it once coding of the feature is complete.
> > 
> > Signed-off-by: Robert Richter <rrichter@amd.com>
> LGTM
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

many thanks for all your instant reviews of that series, that helped a
lot.

-Robert