Received: by 2002:a05:7412:251c:b0:e2:908c:2ebd with SMTP id w28csp8761rda; Fri, 20 Oct 2023 18:02:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGk4qbfp6+aDWAifIXIGWFLBIuhrhTumtxkAmURhGf6tYRbiHiun7cugNrpQ1npoClMkMkY X-Received: by 2002:a05:6871:722:b0:1e9:8b12:89aa with SMTP id f34-20020a056871072200b001e98b1289aamr3749576oap.26.1697850165754; Fri, 20 Oct 2023 18:02:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697850165; cv=none; d=google.com; s=arc-20160816; b=bRu94vrGEqF7htvAfNsa2NXih2/EtM50GneiFF/4w6t1n2QNj8D8U6xe6pKgGeTLh0 15bhvhIeNZoD9gZEKxw4D+hUzl4iRvTpsmFhrKLbM6ECTLeEFW9/q25z+b8tMYoexuvX D1uFYxiw4fFwQP1fu+Dw8NUIfl/cS2+MVsWRBRQMbVIt4t3mWWxI95L07hZHxOuOO3OA uJaZoup2F6p6dLwpAPKjt5GvdxKkqZirUwY7KO5D7QpPuZiA6oVkG+smOX3Xd+JHwO2w uMkmPdF9zL5yBZG6Owao3fRHUvYxB2Zmtx564VUCDsUrykn1RF5HOuLIOzNGVrIdUTpK hxJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=eWuUTNls7692C8UzxXcfKBZPoQd2D3qScv4/DrRh000=; fh=xfo0dCQWTVcH+JAKN46QrHiGSin1PrigZ8mlN7eL2I0=; b=cPuIkOmWHezN1ku7MpDxlsZkS5cZ+AbsPmYuuclLRUtyJSkjTaT9v+fMNTBLlUAJIz 2Xld+HJbq6dakpDynWGgWw3IhOx3P7hlAfKkCjV93m8coQjFOfQG292wwsY3XJypJn4z byCxpldBWD2Z3n6D3G9iaDToLhiE63wGJm51HD59LxqDKCAKrPZo4EvNAaPIsJfF9DLa KrY2xh29SzI0P+3yqCP/EF5L06AW0yTEG3nCfjDrZ1EltmvOcdVTv3KpSJHFGJFH7mCp o/2nkd53dIjmB2DEDGCAEJD02xp2MKU12TWonu8OsyadvH1BN6FjjRI8QD1zB+9DThvM sO/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bUyNR6kF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id u6-20020a056a00158600b006935df3019esi2880382pfk.235.2023.10.20.18.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Oct 2023 18:02:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bUyNR6kF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 4FEB981F84C7; Fri, 20 Oct 2023 18:02:40 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229772AbjJUBBQ (ORCPT + 99 others); Fri, 20 Oct 2023 21:01:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229500AbjJUBBP (ORCPT ); Fri, 20 Oct 2023 21:01:15 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33616D45; Fri, 20 Oct 2023 18:01:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697850070; x=1729386070; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=Iz3NGqbBHff7rhfQuW/ddJUpEWgOz5h6WUqcnEVHelc=; b=bUyNR6kF4PG/IlV4hdP2X5BKuE0AbETVCaiVlQLgkbP/PTANXOAFnm5L kQVa2+riudiqQmWP5e51+Rhy5j8Kq4UAK7e5H8BWa9EsETlfALlJqPAgm bIYnXQwDtloUYasxnkS3p5bblb/1QVVBecYnx6VCO4JiL3lZFxML7pPaX RT/IjEVy8kErPkmZEeULJ+nON8j4reTmgS7Jo0Ey4KpiQyehjCZUxJ3a5 vHq1svwpg3d5tvefnMxKCCmrufYhnh+ABpZHmq430lAsGvV/1ZQd72JrY SePE8aI1syqR+8T7uawYjYbinkRBqCoCPPeotcg/XlPH3hOt50g88/xJz A==; X-IronPort-AV: E=McAfee;i="6600,9927,10869"; a="390488826" X-IronPort-AV: E=Sophos;i="6.03,239,1694761200"; d="scan'208";a="390488826" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2023 18:01:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10869"; a="848250110" X-IronPort-AV: E=Sophos;i="6.03,239,1694761200"; d="scan'208";a="848250110" Received: from hkchanda-mobl.amr.corp.intel.com (HELO desk) ([10.209.90.113]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2023 18:01:07 -0700 Date: Fri, 20 Oct 2023 18:00:59 -0700 From: Pawan Gupta To: Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Jonathan Corbet , Paolo Bonzini , tony.luck@intel.com, ak@linux.intel.com, tim.c.chen@linux.intel.com, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, Alyssa Milburn , Daniel Sneddon , antonio.gomez.iglesias@linux.intel.com, Alyssa Milburn Subject: Re: [PATCH 1/6] x86/bugs: Add asm helpers for executing VERW Message-ID: <20231021010059.ixziwh552wfjtkfd@desk> References: <20231020-delay-verw-v1-0-cff54096326d@linux.intel.com> <20231020-delay-verw-v1-1-cff54096326d@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 20 Oct 2023 18:02:40 -0700 (PDT) On Fri, Oct 20, 2023 at 04:13:13PM -0700, Sean Christopherson wrote: > On Fri, Oct 20, 2023, Pawan Gupta wrote: > > diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h > > index c55cc243592e..e1b623a27e1b 100644 > > --- a/arch/x86/include/asm/nospec-branch.h > > +++ b/arch/x86/include/asm/nospec-branch.h > > @@ -111,6 +111,24 @@ > > #define RESET_CALL_DEPTH_FROM_CALL > > #endif > > > > +/* > > + * Macro to execute VERW instruction to mitigate transient data sampling > > + * attacks such as MDS. On affected systems a microcode update overloaded VERW > > + * instruction to also clear the CPU buffers. > > + * > > + * Note: Only the memory operand variant of VERW clears the CPU buffers. To > > + * handle the case when VERW is executed after user registers are restored, use > > + * RIP to point the memory operand to a part NOPL instruction that contains > > + * __KERNEL_DS. > > + */ > > +#define __EXEC_VERW(m) verw _ASM_RIP(m) > > + > > +#define EXEC_VERW \ > > + __EXEC_VERW(551f); \ > > + /* nopl __KERNEL_DS(%rax) */ \ > > + .byte 0x0f, 0x1f, 0x80, 0x00, 0x00; \ > > +551: .word __KERNEL_DS; \ > > Why are there so many macro layers? Nothing jumps out to justfying two layers, > let alone three. I can't remember the exact reason, but I think the reason I added __EXEC_VERW() was because using EXEC_VERW() in a C function was leading to build error in the internal draft version. This version is not calling it from C, so yes I can get rid of the extra layer. > > /* > > * Fill the CPU return stack buffer. > > * > > @@ -329,6 +347,13 @@ > > #endif > > .endm > > > > +/* Clear CPU buffers before returning to user */ > > +.macro USER_CLEAR_CPU_BUFFERS > > + ALTERNATIVE "jmp .Lskip_verw_\@;", "", X86_FEATURE_USER_CLEAR_CPU_BUF > > + EXEC_VERW > > Rather than a NOP after VERW, why not something like this? > > /* Clear CPU buffers before returning to user */ > .macro USER_CLEAR_CPU_BUFFERS > ALTERNATIVE "jmp .Lskip_verw_\@;", "jmp .Ldo_verw_\@;", X86_FEATURE_USER_CLEAR_CPU_BUF > 551: .word __KERNEL_DS > .Ldo_verw_\@: verw _ASM_RIP(551b) > .Lskip_verw_\@: > .endm I wasn't comfortable adding a variable directly in the instruction stream because the CPU may interpret it wrongly. With NOP it is bound to ignore the data part.