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Message-ID: <a836dc4d-99e3-494d-b374-594f53287bae@wanadoo.fr>
Date:   Sun, 22 Oct 2023 18:27:52 +0200
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Subject: Re: [PATCH v13 4/8] media: chips-media: wave5: Add vpuapi layer
Content-Language: fr
To:     Sebastian Fricke <sebastian.fricke@collabora.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        NXP Linux Team <linux-imx@nxp.com>,
        Conor Dooley <conor+dt@kernel.org>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        Jackson Lee <jackson.lee@chipsnmedia.com>,
        Hans Verkuil <hverkuil@xs4all.nl>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Shawn Guo <shawnguo@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Nas Chung <nas.chung@chipsnmedia.com>,
        Fabio Estevam <festevam@gmail.com>
Cc:     linux-media@vger.kernel.org, Tomasz Figa <tfiga@chromium.org>,
        linux-kernel@vger.kernel.org,
        Nicolas Dufresne <nicolas.dufresne@collabora.com>,
        kernel@collabora.com, Robert Beckett <bob.beckett@collabora.com>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Darren Etheridge <detheridge@ti.com>
References: <20230929-wave5_v13_media_master-v13-0-5ac60ccbf2ce@collabora.com>
 <20230929-wave5_v13_media_master-v13-4-5ac60ccbf2ce@collabora.com>
From:   Christophe JAILLET <christophe.jaillet@wanadoo.fr>
In-Reply-To: <20230929-wave5_v13_media_master-v13-4-5ac60ccbf2ce@collabora.com>
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Precedence: bulk

Le 12/10/2023 à 13:01, Sebastian Fricke a écrit :
> From: Nas Chung <nas.chung@chipsnmedia.com>
> 
> Add the vpuapi layer of the wave5 codec driver.
> This layer is used to configure the hardware according
> to the parameters.
> 
> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
> Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
> ---

...

> +int wave5_vpu_dec_clr_disp_flag(struct vpu_instance *inst, int index)
> +{
> +	struct dec_info *p_dec_info = &inst->codec_info->dec_info;
> +	int ret = 0;

Nit: No need to init.

> +	struct vpu_device *vpu_dev = inst->dev;
> +
> +	if (index >= p_dec_info->num_of_display_fbs)
> +		return -EINVAL;
> +
> +	ret = mutex_lock_interruptible(&vpu_dev->hw_lock);
> +	if (ret)
> +		return ret;
> +	ret = wave5_dec_clr_disp_flag(inst, index);
> +	mutex_unlock(&vpu_dev->hw_lock);
> +
> +	return ret;
> +}

...

> +int wave5_vpu_dec_give_command(struct vpu_instance *inst, enum codec_command cmd, void *parameter)
> +{
> +	struct dec_info *p_dec_info = &inst->codec_info->dec_info;
> +	int ret = 0;
> +
> +	switch (cmd) {
> +	case DEC_GET_QUEUE_STATUS: {
> +		struct queue_status_info *queue_info = parameter;
> +
> +		queue_info->instance_queue_count = p_dec_info->instance_queue_count;
> +		queue_info->report_queue_count = p_dec_info->report_queue_count;
> +		break;
> +	}
> +	case DEC_RESET_FRAMEBUF_INFO: {
> +		int i;
> +
> +		for (i = 0; i < MAX_REG_FRAME; i++) {
> +			ret = wave5_vpu_dec_reset_framebuffer(inst, i);
> +			if (ret)
> +				break;
> +		}
> +
> +		for (i = 0; i < MAX_REG_FRAME; i++) {
> +			ret = reset_auxiliary_buffers(inst, i);
> +			if (ret)
> +				break;
> +		}
> +
> +		wave5_vdi_free_dma_memory(inst->dev, &p_dec_info->vb_task);
> +		break;
> +	}
> +	case DEC_GET_SEQ_INFO: {
> +		struct dec_initial_info *seq_info = parameter;
> +
> +		*seq_info = p_dec_info->initial_info;
> +		break;
> +	}
> +
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	return 0;

return ret;
?

CJ

> +}

...