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([2a01:e0a:999:a3a0:17bb:4fd9:531:a7cc]) by smtp.gmail.com with ESMTPSA id x22-20020a05600c189600b004083a105f27sm13228369wmp.26.2023.10.23.00.24.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Oct 2023 00:24:31 -0700 (PDT) Message-ID: <3f383b96-87ae-4580-a23d-0196bbd8ec91@rivosinc.com> Date: Mon, 23 Oct 2023 09:24:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/19] riscv: add ISA extension parsing for vector crypto extensions Content-Language: en-US To: Evan Green , Conor Dooley Cc: Jerry Shih , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Albert Ou , Jonathan Corbet , Andrew Jones , Samuel Ortiz References: <20231017131456.2053396-1-cleger@rivosinc.com> <20231017131456.2053396-6-cleger@rivosinc.com> <7626f978-e9ea-4f8f-b814-aeac02bd3712@rivosinc.com> <20231019-nuclear-vista-ef3e0b9bef71@spud> From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 23 Oct 2023 00:24:45 -0700 (PDT) On 19/10/2023 18:19, Evan Green wrote: > On Thu, Oct 19, 2023 at 8:33 AM Conor Dooley wrote: >> >> On Thu, Oct 19, 2023 at 11:35:59AM +0200, Clément Léger wrote: >>> >>> >>> On 18/10/2023 19:26, Evan Green wrote: >>>> On Wed, Oct 18, 2023 at 5:53 AM Clément Léger wrote: >>>>> >>>>> >>>>> >>>>> On 18/10/2023 03:45, Jerry Shih wrote: >>>>>> On Oct 17, 2023, at 21:14, Clément Léger wrote: >>>>>>> @@ -221,6 +261,22 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { >>>>>>> __RISCV_ISA_EXT_DATA(zkt, RISCV_ISA_EXT_ZKT), >>>>>>> __RISCV_ISA_EXT_DATA(zksed, RISCV_ISA_EXT_ZKSED), >>>>>>> __RISCV_ISA_EXT_DATA(zksh, RISCV_ISA_EXT_ZKSH), >>>>>>> + __RISCV_ISA_EXT_DATA(zvbb, RISCV_ISA_EXT_ZVBB), >>>>>>> + __RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC), >>>>>>> + __RISCV_ISA_EXT_DATA(zvkb, RISCV_ISA_EXT_ZVKB), >>>>>> >>>>>> The `Zvkb` is the subset of `Zvbb`[1]. So, the `Zvkb` should be bundled with `Zvbb`. >>>>> >>>>> Hi Jerry, >>>>> >>>>> Thanks for catching this, I think some other extensions will fall in >>>>> this category as well then (Zvknha/Zvknhb). I will verify that. >>>> >>>> The bundling mechanism works well when an extension is a pure lasso >>>> around other extensions. We'd have to tweak that code if we wanted to >>>> support cases like this, where the extension is a superset of others, >>>> but also contains loose change not present anywhere else (and >>>> therefore also needs to stand as a separate bit). >>> >>> For Zvbb and Zvknhb, I used the following code: >>> >>> static const unsigned int riscv_zvbb_bundled_exts[] = { >>> RISCV_ISA_EXT_ZVKB, >>> RISCV_ISA_EXT_ZVBB >>> }; >>> >>> static const unsigned int riscv_zvknhb_bundled_exts[] = { >>> RISCV_ISA_EXT_ZVKNHA, >>> RISCV_ISA_EXT_ZVKNHB >>> }; >>> >>> Which correctly results in both extension (superset + base set) being >>> enabled when only one is set. Is there something that I'm missing ? >>> >>>> >>>> IMO, decomposing "pure" bundles makes sense since otherwise usermode >>>> would have to query multiple distinct bitmaps that meant the same >>>> thing (eg check the Zk bit, or maybe check the Zkn/Zkr/Zkt bits, or >>>> maybe check the Zbkb/Zbkc... bits, and they're all equivalent). But >>>> when an extension is a superset that also contains loose change, there >>>> really aren't two equivalent bitmasks, each bit adds something new. >>> >>> Agreed but if a system only report ZVBB for instance and the user wants >>> ZVKB, then it is clear that ZVKB should be reported as well I guess. So >>> in the end, it works much like "bundle" extension, just that the bundle >>> is actually a "real" ISA extension by itself. >>> >>> Clément >>> >>>> >>>> There's an argument to be made for still turning on the containing >>>> extensions to cover for silly ISA strings (eg ISA strings that >>>> advertise the superset but fail to advertise the containing >>>> extensions). We can decide if we want to work that hard to cover >>>> hypothetical broken ISA strings now, or wait until they show up. >>>> Personally I would wait until something broken shows up. But others >>>> may feel differently. >> >> I'm not really sure that those are "silly" ISA strings. People are going >> to do it that way because it is much easier than spelling out 5 dozen >> sub-components, and it is pretty inevitable that subsets will be >> introduced in the future for extensions we currently have. >> >> IMO, it's perfectly valid to say you have the supersets and not spell >> out all the subcomponents. > > Hm, ok. If ISA strings are likely to be written that way, then I agree > having the kernel flip on all the contained extensions is a good idea. > We can tweak patch 2 to support the parsing of struct > riscv_isa_ext_data with both .id and .bundle_size set (instead of only > one or the other as it is now). Looking back at that patch, it looks > quite doable. Alright! Hey Evan, do you have anything against using this code: static const unsigned int riscv_zvbb_bundled_exts[] = { RISCV_ISA_EXT_ZVKB, RISCV_ISA_EXT_ZVBB }; ... Then declaring zvbb like that: __RISCV_ISA_EXT_BUNDLE(zvbb, riscv_zvbb_bundled_exts), I agree that it is *not* a bundled extension but it actually already works with Conor's code. Not sure that adding more code is needed to handle that case. Clément > > -Evan