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[23.128.96.35]) by mx.google.com with ESMTPS id ca27-20020a056a02069b00b0058bfcc0f4b7si6413333pgb.473.2023.10.23.01.01.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 01:01:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 916488062349; Mon, 23 Oct 2023 01:01:17 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229513AbjJWIBB (ORCPT + 99 others); Mon, 23 Oct 2023 04:01:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229452AbjJWIBA (ORCPT ); Mon, 23 Oct 2023 04:01:00 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 272ACA6; Mon, 23 Oct 2023 01:00:56 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 5560924E38F; Mon, 23 Oct 2023 16:00:53 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 23 Oct 2023 16:00:53 +0800 Received: from [192.168.120.47] (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 23 Oct 2023 16:00:52 +0800 Message-ID: Date: Mon, 23 Oct 2023 16:00:51 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/4] dt-bindings: pwm: Add OpenCores PWM module To: Conor Dooley CC: , , , , "Emil Renner Berthing" , Rob Herring , Thierry Reding , Philipp Zabel , "Krzysztof Kozlowski" , Conor Dooley , =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= , Hal Feng , "Paul Walmsley" , Palmer Dabbelt , Albert Ou References: <20231020103741.557735-1-william.qiu@starfivetech.com> <20231020103741.557735-2-william.qiu@starfivetech.com> <20231020-barley-rosy-92c3688cd515@spud> Content-Language: en-US From: William Qiu In-Reply-To: <20231020-barley-rosy-92c3688cd515@spud> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Mon, 23 Oct 2023 01:01:17 -0700 (PDT) On 2023/10/20 22:21, Conor Dooley wrote: > Krzysztof, William, > > On Fri, Oct 20, 2023 at 06:37:38PM +0800, William Qiu wrote: >> Add documentation to describe OpenCores Pulse Width Modulation >> controller driver. >> >> Signed-off-by: William Qiu >> Reviewed-by: Krzysztof Kozlowski >> Reviewed-by: Hal Feng >> --- >> .../bindings/pwm/opencores,pwm-ocores.yaml | 53 +++++++++++++++++++ >> 1 file changed, 53 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pwm/opencores,pwm-ocores.yaml >> >> diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm-ocores.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm-ocores.yaml >> new file mode 100644 >> index 000000000000..0f6a3434f155 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pwm/opencores,pwm-ocores.yaml >> @@ -0,0 +1,53 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pwm/opencores,pwm-ocores.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: OpenCores PWM controller >> + >> +maintainers: >> + - William Qiu >> + >> +description: >> + OpenCores PTC ip core contains a PWM controller. When operating in PWM mode, the PTC core >> + generates binary signal with user-programmable low and high periods. All PTC counters and >> + registers are 32-bit. >> + >> +allOf: >> + - $ref: pwm.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - opencores,pwm-ocores > > What does the extra "ocores" suffix add, when it just repeats the vendor > prefix? > >> + - starfive,jh71x0-pwm > > Krzysztof, did you approve this generic compatible? > > And the whole thing looks like it should really be something like > > items: > - enum: > - starfive,jh7100-pwm > - starfive,jh7110-pwm > - const: opencores,pwm > > Cheers, > Conor. > I'm going to use this format. Thanks, William >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + resets: >> + maxItems: 1 >> + >> + "#pwm-cells": >> + const: 3 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + pwm@12490000 { >> + compatible = "opencores,pwm-ocores"; >> + reg = <0x12490000 0x10000>; >> + clocks = <&clkgen 181>; >> + resets = <&rstgen 109>; >> + #pwm-cells = <3>; >> + }; >> -- >> 2.34.1 >>