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[2620:137:e000::3:6]) by mx.google.com with ESMTPS id cm13-20020a056a020a0d00b00577680ccf1bsi6274634pgb.709.2023.10.23.02.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 02:03:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id A21C1805A914; Mon, 23 Oct 2023 02:03:21 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231671AbjJWJCr (ORCPT + 99 others); Mon, 23 Oct 2023 05:02:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229661AbjJWJCp (ORCPT ); Mon, 23 Oct 2023 05:02:45 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BEBF198; Mon, 23 Oct 2023 02:02:41 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C2812F4; Mon, 23 Oct 2023 02:03:22 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.70.183]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F1B703F64C; Mon, 23 Oct 2023 02:02:39 -0700 (PDT) Date: Mon, 23 Oct 2023 10:02:37 +0100 From: Mark Rutland To: Arnd Bergmann Cc: Maria Yu , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, linux-arm-msm@vger.kernel.org, Ard Biesheuvel Subject: Re: [PATCH] arm64: module: PLT allowed even !RANDOM_BASE Message-ID: References: <20231023075714.21672-1-quic_aiquny@quicinc.com> <56c2d30b-2f25-4613-aab1-00fccbd2fa05@app.fastmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <56c2d30b-2f25-4613-aab1-00fccbd2fa05@app.fastmail.com> X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 23 Oct 2023 02:03:21 -0700 (PDT) On Mon, Oct 23, 2023 at 10:08:33AM +0200, Arnd Bergmann wrote: > On Mon, Oct 23, 2023, at 09:57, Maria Yu wrote: > > Module PLT feature can be enabled even when RANDOM_BASE is disabled. > > Break BLT entry counts of relocation types will make module plt entry > > allocation fail and finally exec format error for even correct and plt > > allocation available modules. Has an actual problem been seen in practice, or was this found by looking at the code? > > > > Signed-off-by: Maria Yu > > Adding Ard Biesheuvel to Cc, as he added the check in commit > a257e02579e42 ("arm64/kernel: don't ban ADRP to work around > Cortex-A53 erratum #843419") I think that the actual mistake is in commit: 3e35d303ab7d22c4 ("arm64: module: rework module VA range selection") Prior to that commit, when CONFIG_RANDOMIZE_BASE=n all modules and code had to be within 128M of each other, and so there were no PLTs necessary for B/BL. After that commit we can have a 2G module range regardless of CONFIG_RANDOMIZE_BASE, and PLTs may be necessary for B/BL. We should have removed the check for !CONFIG_RANDOMIZE_BASE as part of that. > > arch/arm64/kernel/module-plts.c | 3 --- > > 1 file changed, 3 deletions(-) > > > > diff --git a/arch/arm64/kernel/module-plts.c > > b/arch/arm64/kernel/module-plts.c > > index bd69a4e7cd60..21a67d52d7a0 100644 > > --- a/arch/arm64/kernel/module-plts.c > > +++ b/arch/arm64/kernel/module-plts.c > > @@ -167,9 +167,6 @@ static unsigned int count_plts(Elf64_Sym *syms, > > Elf64_Rela *rela, int num, > > switch (ELF64_R_TYPE(rela[i].r_info)) { > > case R_AARCH64_JUMP26: > > case R_AARCH64_CALL26: > > - if (!IS_ENABLED(CONFIG_RANDOMIZE_BASE)) > > - break; > > - > > /* > > * We only have to consider branch targets that resolve > > * to symbols that are defined in a different section. > > I see there are two such checks (in partition_branch_plt_relas() > and in count_plts()), can you explain in more detail how you > concluded that one of them is correct but the other one is not? I believe that the one in partition_branch_plt_relas() needs to go too; that's just a minor optimization for the case where there shouldn't be any PLTs for B/BL, and it no longer holds after the module VA range rework. That was introduced in commit: d4e0340919fb9190 ("arm64/module: Optimize module load time by optimizing PLT counting") Thanks, Mark.