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([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:48 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 0/7] irqchip/renesas-rzg2l: add support for RZ/G3S SoC Date: Mon, 23 Oct 2023 13:22:16 +0300 Message-Id: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 23 Oct 2023 03:22:58 -0700 (PDT) From: Claudiu Beznea Hi, Series adds support for IA55 available on RZ/G3S SoC. Patches are split as follows: - 1/7 updates documentation - 2/7 adds IA55 clock - 3/7 minor cleanup on the way TITSR fields are populated - 4/7 implement restriction described in HW manual for ISCR register - 5/7 adds support for suspend to RAM - 6/7 minor cleanup that replaces spaces with tabs on macro definition - 7/7 adds IA55 device tree node Thank you, Claudiu Beznea Claudiu Beznea (7): dt-bindings: interrupt-controller: renesas,rzg2l-irqc: document RZ/G3S clk: renesas: r9a08g045: add IA55 pclk and its reset irqchip/renesas-rzg2l: add macros to retrieve TITSR index and associated selector irqchip/renesas-rzg2l: implement restriction when writing ISCR register irqchip/renesas-rzg2l: cache registers on suspend/resume irqchip/renesas-rzg2l: use tabs instead of spaces arm64: dts: renesas: r9108g045: add irqc .../renesas,rzg2l-irqc.yaml | 5 +- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 68 +++++++++++ drivers/clk/renesas/r9a08g045-cpg.c | 3 + drivers/irqchip/irq-renesas-rzg2l.c | 111 ++++++++++++------ 4 files changed, 152 insertions(+), 35 deletions(-) -- 2.39.2