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Mon, 23 Oct 2023 07:40:56 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 23 Oct 2023 16:40:11 +0200 Subject: [PATCH 11/18] dt-bindings: pwm: add power-domains property MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20231023-display-support-v1-11-5c860ed5c33b@baylibre.com> References: <20231023-display-support-v1-0-5c860ed5c33b@baylibre.com> In-Reply-To: <20231023-display-support-v1-0-5c860ed5c33b@baylibre.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jitao Shi , Xinlei Lee , CK Hu , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Catalin Marinas , Will Deacon Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 23 Oct 2023 07:41:57 -0700 (PDT) According to the Mediatek datasheet, the display PWM block has a power domain. Signed-off-by: Alexandre Mergnat --- Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml index 153e146df7d4..efe0cacf55b7 100644 --- a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml +++ b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml @@ -53,6 +53,12 @@ properties: - const: main - const: mm + power-domains: + maxItems: 1 + description: A phandle and PM domain specifier as defined by bindings of + the power controller specified by phandle. See + Documentation/devicetree/bindings/power/power-domain.yaml for details. + required: - compatible - reg @@ -67,6 +73,7 @@ examples: #include #include #include + #include pwm0: pwm@1401e000 { compatible = "mediatek,mt8173-disp-pwm"; @@ -75,4 +82,5 @@ examples: clocks = <&mmsys CLK_MM_DISP_PWM026M>, <&mmsys CLK_MM_DISP_PWM0MM>; clock-names = "main", "mm"; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; }; -- 2.25.1