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[2003:c9:3f00:4700:1ec2:5c15:da4a:4a7b]) by smtp.gmail.com with ESMTPSA id i7-20020a05620a0a0700b00767d572d651sm2816785qka.87.2023.10.23.09.20.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 09:20:10 -0700 (PDT) Date: Mon, 23 Oct 2023 18:20:05 +0200 (CEST) From: Sebastian Ott To: Raghavendra Rao Ananta cc: Oliver Upton , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v8 04/13] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU In-Reply-To: <20231020214053.2144305-5-rananta@google.com> Message-ID: References: <20231020214053.2144305-1-rananta@google.com> <20231020214053.2144305-5-rananta@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,RCVD_IN_SORBS_WEB,SPF_HELO_NONE, SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 23 Oct 2023 09:21:11 -0700 (PDT) On Fri, 20 Oct 2023, Raghavendra Rao Ananta wrote: > The number of PMU event counters is indicated in PMCR_EL0.N. > For a vCPU with PMUv3 configured, the value is set to the same > value as the current PE on every vCPU reset. Unless the vCPU is > pinned to PEs that has the PMU associated to the guest from the > initial vCPU reset, the value might be different from the PMU's > PMCR_EL0.N on heterogeneous PMU systems. > > Fix this by setting the vCPU's PMCR_EL0.N to the PMU's PMCR_EL0.N > value. Track the PMCR_EL0.N per guest, as only one PMU can be set > for the guest (PMCR_EL0.N must be the same for all vCPUs of the > guest), and it is convenient for updating the value. > > To achieve this, the patch introduces a helper, > kvm_arm_pmu_get_max_counters(), that reads the maximum number of > counters from the arm_pmu associated to the VM. Make the function > global as upcoming patches will be interested to know the value > while setting the PMCR.N of the guest from userspace. > > KVM does not yet support userspace modifying PMCR_EL0.N. > The following patch will add support for that. > > Signed-off-by: Reiji Watanabe > Signed-off-by: Raghavendra Rao Ananta Reviewed-by: Sebastian Ott