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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Mario Limonciello <mario.limonciello@amd.com>,
        Hans de Goede <hdegoede@redhat.com>, kys@microsoft.com,
        hpa@linux.intel.com
Cc:     x86@kernel.org, LKML <linux-kernel@vger.kernel.org>,
        Borislav Petkov <bp@alien8.de>
Subject: Re: PIC probing code from e179f6914152 failing
In-Reply-To: <08889426-e8e7-491b-bcc6-fd001bad3269@amd.com>
References: <c8d43894-7e66-4a01-88fc-10708dc53b6b@amd.com>
 <878r7z4kb4.ffs@tglx> <e79dea49-0c07-4ca2-b359-97dd1bc579c8@amd.com>
 <87ttqhcotn.ffs@tglx> <08889426-e8e7-491b-bcc6-fd001bad3269@amd.com>
Date:   Mon, 23 Oct 2023 19:50:48 +0200
Message-ID: <87lebtcjnr.ffs@tglx>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

On Mon, Oct 23 2023 at 11:17, Mario Limonciello wrote:
> On 10/23/2023 10:59, Thomas Gleixner wrote:
>>> IOW NULL pic case has IORESOURCE_DISABLED / IORESOURCE_UNSET
>> 
>> So the real question is WHY are the DISABLED/UNSET flags not set in the
>> PIC case?

Do you have an answer for this?
 
>>> NULL case:
>>> handler:  handle_edge_irq
>>> dstate:   0x3740c208
>>>               IRQ_TYPE_LEVEL_LOW
>>>
>>> PIC case:
>>> handler:  handle_fasteoi_irq
>>> dstate:   0x3740e208
>>>               IRQ_TYPE_LEVEL_LOW
>>>               IRQD_LEVEL
>>>
>>> I guess something related to the callpath for mp_register_handler().
>> 
>> Guessing is not helpful.
>> 
>> There is a difference in how the allocation info is set up when legacy
>> PIC is enabled, but that does not explain the above resource flag
>> difference.
>
> I did a pile of printks and that's how I realized it's because of the 
> missing call to mp_register_handler() which is dependent upon what 
> appeared to me to be a superfluous number of legacy IRQs check (patch 1 
> in my solution).

What exactly is superfluous about these legacy checks?

Thanks,

        tglx