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Date:   Mon, 23 Oct 2023 20:01:56 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Romain Gantois <romain.gantois@bootlin.com>
Cc:     davem@davemloft.net, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        Paolo Abeni <pabeni@redhat.com>, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        thomas.petazzoni@bootlin.com,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org,
        Vladimir Oltean <vladimir.oltean@nxp.com>,
        Luka Perkov <luka.perkov@sartura.hr>,
        Robert Marko <robert.marko@sartura.hr>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Maxime Chevallier <maxime.chevallier@bootlin.com>
Subject: Re: [PATCH net-next 4/5] net: ipqess: add a PSGMII calibration
 procedure to the IPQESS driver
Message-ID: <df71bbe5-fec0-45cc-adb4-acfbcc356ba3@lunn.ch>
References: <20231023155013.512999-1-romain.gantois@bootlin.com>
 <20231023155013.512999-5-romain.gantois@bootlin.com>
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On Mon, Oct 23, 2023 at 05:50:11PM +0200, Romain Gantois wrote:
> The IPQ4019 Ethernet Switch Subsystem uses a PSGMII link to communicate
> with a QCA8075 5-port PHY. This 1G link requires calibration before it can
> be used reliably.
> 
> This commit introduces a calibration procedure followed by thourough
> testing of the link between each switch port and its corresponding PHY
> port.

Could you explain the architecture in a bit more detail.

When i see MAC code messing with a PHY, i normally say move it into
the PHY driver. But its not clear to me if you are talking about the
real PHYs here, or this is the switch end of the link, and it has some
sort of a PHY to talk to the quint PHY?

     Andrew