Received: by 2002:a05:7412:251c:b0:e2:908c:2ebd with SMTP id w28csp1458837rda; Mon, 23 Oct 2023 13:18:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFHkVZJtAESdr/RtqlKDkfwqLL58WC3rVUx+8E/w9EH0/7dAfMLvj9+lApjU2YPBtIc/o4m X-Received: by 2002:a17:90a:7021:b0:27d:241a:dd89 with SMTP id f30-20020a17090a702100b0027d241add89mr10275849pjk.40.1698092297037; Mon, 23 Oct 2023 13:18:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698092297; cv=none; d=google.com; s=arc-20160816; b=On5JzQ8UcpRPHzsqSrCrHDNCP2mkQzm/p6Niun7LZJ7ilDBlKXxmmYXDo0v2mkadYw 5WaL0A0vaQBAhUvgB2RX3PW10LNX2mwUyLMtLWp3687JGWRq8A90VsAa4hDqIicZ/4o+ pgJDhd3IKU6yWMo2O97+5LnWUFSoYjD9Vk1CIXLGOdg0B+AeubUKErXBIObpLfJwHuo7 /VM+mW4gLKjINZg4FsGC3tNmhDp7vhPg9NN3N6zOjW2LX6mc3oRAesg9qRSDrHq+iwdx qjD8TI6mWkMNbAHhrWEL+kYfwmu6L1AE7Tpbh7nPBazB9V+qmGmZEu5RNn1jd8kEQ0L4 gj4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FD3hNS4lVu6ICJ/H/yivP4f39flTbICE8fR7cEiOx8M=; fh=8dtrvlz6eC1As92HJPwYWdp8qGhbMzdOhqcu6vG4iUM=; b=rtGasPKhENVGEynjjA9i1loag9ykHgyxFyshZvO3DpqkcYdT4n4DG24fBeOgbD9ipj UYr9jDUKogKPlX6xB8ApFLqrkLirXRCrMi/RZVDKX1RpNDw9Rd5K8/jMgiKQBPmR1NkJ u4bVxXK/NrJi0b2eRYF68+Qk4DwMPosQo/fDKJX0IrQXvDsdHuWz0sMCvFJEGcNuhYUF gjJ2AyZpA0+0D5vWvvIyy+bDfWhcx//oiu9PPWgEN7M2DsrNyYf4uCxFMYSHz8jEES9E KdXKArCBwNJz/IQZQxlCIP2EC4VbtBxvLhwIQwUssJuFpKU7GKOwj0XzYHfR5TwAY0zf CnhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=N9mMo560; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id v19-20020a17090ac91300b0027e022bd420si8100291pjt.77.2023.10.23.13.18.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 13:18:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=N9mMo560; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 40D2180B81CE; Mon, 23 Oct 2023 13:18:16 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230486AbjJWUSM (ORCPT + 99 others); Mon, 23 Oct 2023 16:18:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230420AbjJWUSK (ORCPT ); Mon, 23 Oct 2023 16:18:10 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A9B7D68 for ; Mon, 23 Oct 2023 13:17:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1698092244; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FD3hNS4lVu6ICJ/H/yivP4f39flTbICE8fR7cEiOx8M=; b=N9mMo560jAipA3vnOEqz41Df4W5c+u82hZIL6OtIM8HVWUX+1s+CPhIMNTkgCqlnxndIty kuZsR2/77K4e7KfLc8zyk4Yk07JA7jimMvhGarrDid/sfkgyVB//hD42dc6eNGGAkI+HMG GtMs1magCiX9bQA65e3scvbAWTUcqhQ= Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-408-jMtT7R-8M9Cgv-QOF3uCgw-1; Mon, 23 Oct 2023 16:17:12 -0400 X-MC-Unique: jMtT7R-8M9Cgv-QOF3uCgw-1 Received: by mail-ej1-f72.google.com with SMTP id a640c23a62f3a-993eeb3a950so235716666b.2 for ; Mon, 23 Oct 2023 13:17:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698092232; x=1698697032; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FD3hNS4lVu6ICJ/H/yivP4f39flTbICE8fR7cEiOx8M=; b=hRcvPtZGZiDTlik+aTPvyS9N+GFK+Z0hvXrLW9RZNLlQ18NyESmTCgN8z0uQxPyP+R iFU2Envz/iPB9V4HpTGdQmwHqaHJW/0ikGN0HqXg3BoYtdARHDPkUDptxyiDsaTe5Tpw IldmDNbcWw9nPKd1HY3dmLZg489oB3dEp4L8SwuxyvoiAO0SOe6eAEvumwWnu72rt7vO yO+AoSEWletzb8aMxoY6ZeFzJ2X5mltR78cyYrGIwo8wUkARPb+eSehcyKiRIBlHR3hB zWP0Ahs0ZHvcSwzY3b20ZkvpZKqKoVrwY5vOgTJ8wu4L1sIfkIEkAv5LMjxseaNRGnvy v4ZQ== X-Gm-Message-State: AOJu0Yz89dOWDazRx2Oyfd062DOQQzmVP9c5dwY2ly8K4U6T9MyfBJq+ 73tF/TM1pDLx5JCRArkdUP3r9iwYNUlErwoqFwskpWrf8hS2zXPcFJ2i1EHUzNHPybGN5yfyLLj ewhfZhMVOMPiQFhlXqRTlb8Zi X-Received: by 2002:a17:906:ee8a:b0:9c7:4e5d:12c5 with SMTP id wt10-20020a170906ee8a00b009c74e5d12c5mr7468011ejb.61.1698092231794; Mon, 23 Oct 2023 13:17:11 -0700 (PDT) X-Received: by 2002:a17:906:ee8a:b0:9c7:4e5d:12c5 with SMTP id wt10-20020a170906ee8a00b009c74e5d12c5mr7468000ejb.61.1698092231498; Mon, 23 Oct 2023 13:17:11 -0700 (PDT) Received: from cassiopeiae.. ([2a02:810d:4b3f:de9c:642:1aff:fe31:a19f]) by smtp.gmail.com with ESMTPSA id w21-20020a170907271500b009ad81554c1bsm7083485ejk.55.2023.10.23.13.17.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 13:17:11 -0700 (PDT) From: Danilo Krummrich To: airlied@gmail.com, daniel@ffwll.ch, matthew.brost@intel.com, thomas.hellstrom@linux.intel.com, sarah.walker@imgtec.com, donald.robson@imgtec.com, boris.brezillon@collabora.com, christian.koenig@amd.com, faith@gfxstrand.net Cc: dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, Danilo Krummrich Subject: [PATCH drm-misc-next v7 2/7] drm/gpuvm: add common dma-resv per struct drm_gpuvm Date: Mon, 23 Oct 2023 22:16:48 +0200 Message-ID: <20231023201659.25332-3-dakr@redhat.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231023201659.25332-1-dakr@redhat.com> References: <20231023201659.25332-1-dakr@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_FILL_THIS_FORM_SHORT autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 23 Oct 2023 13:18:16 -0700 (PDT) Provide a common dma-resv for GEM objects not being used outside of this GPU-VM. This is used in a subsequent patch to generalize dma-resv, external and evicted object handling and GEM validation. Reviewed-by: Thomas Hellström Signed-off-by: Danilo Krummrich --- drivers/gpu/drm/drm_gpuvm.c | 53 ++++++++++++++++++++++++++ drivers/gpu/drm/nouveau/nouveau_uvmm.c | 13 ++++++- include/drm/drm_gpuvm.h | 33 ++++++++++++++++ 3 files changed, 97 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_gpuvm.c b/drivers/gpu/drm/drm_gpuvm.c index d7367a202fee..b9742742a0e8 100644 --- a/drivers/gpu/drm/drm_gpuvm.c +++ b/drivers/gpu/drm/drm_gpuvm.c @@ -61,6 +61,15 @@ * contained within struct drm_gpuva already. Hence, for inserting &drm_gpuva * entries from within dma-fence signalling critical sections it is enough to * pre-allocate the &drm_gpuva structures. + * + * &drm_gem_objects which are private to a single VM can share a common + * &dma_resv in order to improve locking efficiency (e.g. with &drm_exec). + * For this purpose drivers must pass a &drm_gem_object to drm_gpuvm_init(), in + * the following called 'resv object', which serves as the container of the + * GPUVM's shared &dma_resv. This resv object can be a driver specific + * &drm_gem_object, such as the &drm_gem_object containing the root page table, + * but it can also be a 'dummy' object, which can be allocated with + * drm_gpuvm_resv_object_alloc(). */ /** @@ -652,11 +661,49 @@ drm_gpuvm_range_valid(struct drm_gpuvm *gpuvm, !drm_gpuvm_in_kernel_node(gpuvm, addr, range); } +static void +drm_gpuvm_gem_object_free(struct drm_gem_object *obj) +{ + drm_gem_object_release(obj); + kfree(obj); +} + +static const struct drm_gem_object_funcs drm_gpuvm_object_funcs = { + .free = drm_gpuvm_gem_object_free, +}; + +/** + * drm_gpuvm_resv_object_alloc() - allocate a dummy &drm_gem_object + * @drm: the drivers &drm_device + * + * Allocates a dummy &drm_gem_object which can be passed to drm_gpuvm_init() in + * order to serve as root GEM object providing the &drm_resv shared across + * &drm_gem_objects local to a single GPUVM. + * + * Returns: the &drm_gem_object on success, NULL on failure + */ +struct drm_gem_object * +drm_gpuvm_resv_object_alloc(struct drm_device *drm) +{ + struct drm_gem_object *obj; + + obj = kzalloc(sizeof(*obj), GFP_KERNEL); + if (!obj) + return NULL; + + obj->funcs = &drm_gpuvm_object_funcs; + drm_gem_private_object_init(drm, obj, 0); + + return obj; +} +EXPORT_SYMBOL_GPL(drm_gpuvm_resv_object_alloc); + /** * drm_gpuvm_init() - initialize a &drm_gpuvm * @gpuvm: pointer to the &drm_gpuvm to initialize * @name: the name of the GPU VA space * @drm: the &drm_device this VM resides in + * @r_obj: the resv &drm_gem_object providing the GPUVM's common &dma_resv * @start_offset: the start offset of the GPU VA space * @range: the size of the GPU VA space * @reserve_offset: the start of the kernel reserved GPU VA area @@ -671,6 +718,7 @@ drm_gpuvm_range_valid(struct drm_gpuvm *gpuvm, void drm_gpuvm_init(struct drm_gpuvm *gpuvm, const char *name, struct drm_device *drm, + struct drm_gem_object *r_obj, u64 start_offset, u64 range, u64 reserve_offset, u64 reserve_range, const struct drm_gpuvm_ops *ops) @@ -681,6 +729,9 @@ drm_gpuvm_init(struct drm_gpuvm *gpuvm, const char *name, gpuvm->name = name ? name : "unknown"; gpuvm->ops = ops; gpuvm->drm = drm; + gpuvm->r_obj = r_obj; + + drm_gem_object_get(r_obj); drm_gpuvm_check_overflow(gpuvm, start_offset, range); gpuvm->mm_start = start_offset; @@ -715,6 +766,8 @@ drm_gpuvm_destroy(struct drm_gpuvm *gpuvm) drm_WARN(gpuvm->drm, !RB_EMPTY_ROOT(&gpuvm->rb.tree.rb_root), "GPUVA tree is not empty, potentially leaking memory.\n"); + + drm_gem_object_put(gpuvm->r_obj); } EXPORT_SYMBOL_GPL(drm_gpuvm_destroy); diff --git a/drivers/gpu/drm/nouveau/nouveau_uvmm.c b/drivers/gpu/drm/nouveau/nouveau_uvmm.c index aaf5d28bd587..b4e7d662961a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_uvmm.c +++ b/drivers/gpu/drm/nouveau/nouveau_uvmm.c @@ -1809,8 +1809,9 @@ nouveau_uvmm_init(struct nouveau_uvmm *uvmm, struct nouveau_cli *cli, u64 kernel_managed_addr, u64 kernel_managed_size) { struct drm_device *drm = cli->drm->dev; - int ret; + struct drm_gem_object *r_obj; u64 kernel_managed_end = kernel_managed_addr + kernel_managed_size; + int ret; mutex_init(&uvmm->mutex); dma_resv_init(&uvmm->resv); @@ -1834,14 +1835,22 @@ nouveau_uvmm_init(struct nouveau_uvmm *uvmm, struct nouveau_cli *cli, goto out_unlock; } + r_obj = drm_gpuvm_resv_object_alloc(drm); + if (!r_obj) { + ret = -ENOMEM; + goto out_unlock; + } + uvmm->kernel_managed_addr = kernel_managed_addr; uvmm->kernel_managed_size = kernel_managed_size; - drm_gpuvm_init(&uvmm->base, cli->name, drm, + drm_gpuvm_init(&uvmm->base, cli->name, drm, r_obj, NOUVEAU_VA_SPACE_START, NOUVEAU_VA_SPACE_END, kernel_managed_addr, kernel_managed_size, NULL); + /* GPUVM takes care from here on. */ + drm_gem_object_put(r_obj); ret = nvif_vmm_ctor(&cli->mmu, "uvmm", cli->vmm.vmm.object.oclass, RAW, diff --git a/include/drm/drm_gpuvm.h b/include/drm/drm_gpuvm.h index 687fd5893624..5f43a224d0f4 100644 --- a/include/drm/drm_gpuvm.h +++ b/include/drm/drm_gpuvm.h @@ -244,10 +244,16 @@ struct drm_gpuvm { * @ops: &drm_gpuvm_ops providing the split/merge steps to drivers */ const struct drm_gpuvm_ops *ops; + + /** + * @r_obj: Resv GEM object; representing the GPUVM's common &dma_resv. + */ + struct drm_gem_object *r_obj; }; void drm_gpuvm_init(struct drm_gpuvm *gpuvm, const char *name, struct drm_device *drm, + struct drm_gem_object *r_obj, u64 start_offset, u64 range, u64 reserve_offset, u64 reserve_range, const struct drm_gpuvm_ops *ops); @@ -255,6 +261,33 @@ void drm_gpuvm_destroy(struct drm_gpuvm *gpuvm); bool drm_gpuvm_interval_empty(struct drm_gpuvm *gpuvm, u64 addr, u64 range); +struct drm_gem_object * +drm_gpuvm_resv_object_alloc(struct drm_device *drm); + +/** + * drm_gpuvm_resv() - returns the &drm_gpuvm's &dma_resv + * @gpuvm__: the &drm_gpuvm + * + * Returns: a pointer to the &drm_gpuvm's shared &dma_resv + */ +#define drm_gpuvm_resv(gpuvm__) ((gpuvm__)->r_obj->resv) + +/** + * drm_gpuvm_resv_obj() - returns the &drm_gem_object holding the &drm_gpuvm's + * &dma_resv + * @gpuvm__: the &drm_gpuvm + * + * Returns: a pointer to the &drm_gem_object holding the &drm_gpuvm's shared + * &dma_resv + */ +#define drm_gpuvm_resv_obj(gpuvm__) ((gpuvm__)->r_obj) + +#define drm_gpuvm_resv_held(gpuvm__) \ + dma_resv_held(drm_gpuvm_resv(gpuvm__)) + +#define drm_gpuvm_resv_assert_held(gpuvm__) \ + dma_resv_assert_held(drm_gpuvm_resv(gpuvm__)) + static inline struct drm_gpuva * __drm_gpuva_next(struct drm_gpuva *va) { -- 2.41.0