Received: by 2002:a05:7412:251c:b0:e2:908c:2ebd with SMTP id w28csp1770221rda; Tue, 24 Oct 2023 02:46:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFVm8Pcxl6GLaR9SfYg7Kl0YbaqdKnb9aBe4hccnOaLbBun313J70scGlPHBMoh/4IJPqoT X-Received: by 2002:a05:6a20:8e10:b0:153:a461:d96e with SMTP id y16-20020a056a208e1000b00153a461d96emr2184939pzj.47.1698140799844; Tue, 24 Oct 2023 02:46:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698140799; cv=none; d=google.com; s=arc-20160816; b=HrNsi6/sHcD52VpXSCJkWoUf9NC/4D28t+lyas/9wYTI03pGZS8NTi0chlXTJh2GoB TeTC89XsQUX+VHusxkH3VPsbUmzD6ZhhVAm4wqIbmIgxcJHjQOLEVex3GVjK0dcHZtwn 4HWwzOz+66YzhwdM8vsMQEnprCR9xIT2Eo0Pno3O4ovkiYJ1QmT5KA1viYb0K8AbfFvQ MCpcie+CLzP9QK05vL9apu7u/Lf6nAIgH192X0g/v7aUCiGXXZwLGm82yUuEnceNDuJi aYHhT4oPULJuasY56TLlqmODFqX/LSPozMx+vWLbONDQ3YmDpb8NXn1s9sp5HAovN35T shBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id:dkim-signature; bh=YxL8IXJxK6nZZcgY+jbWAe4cJBK0AaStast6oXjM8uc=; fh=FoJ1hOT0oe1l4CqUexR8ElG9OgGR3MtnOwItBQ6NtTM=; b=RpXE78jSpy45POO/9G9QwdQI++cyA96MXPajwWUhstUnvRAsb4XZ+hpNEIYNBZlSw+ mfstQ/C+7WzIT0QtNnMNfr9k4eLDm4qtjrZmLa4YyYkcbnDoYamEFMUOragFB5nBRr8T nYL1n92SI6/6bmntK57zmH2v+HaB5Lrm7gTRYNKDND61nMe0Ftbj68TkJGuBHt7/Oavt 3YBZcQgUjkaYMYh1qCRYs0LMAkQu2334rgubysNMhTidtkN8YlesSlIydiiak1YLOPWt 3xaaYYnlwwQQGe0faivlGd8z91Sg2KGzUQdotxKHKzdpFnalQ2Fg++u50LKRYn3YW9uB iDEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=JBFbsdHM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from fry.vger.email (fry.vger.email. [2620:137:e000::3:8]) by mx.google.com with ESMTPS id sf9-20020a17090b51c900b0027d2c3f25a7si8271154pjb.80.2023.10.24.02.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 02:46:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b=JBFbsdHM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id A8B3280785DD; Tue, 24 Oct 2023 02:46:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234030AbjJXJq2 (ORCPT + 99 others); Tue, 24 Oct 2023 05:46:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233039AbjJXJq1 (ORCPT ); Tue, 24 Oct 2023 05:46:27 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 499D092 for ; Tue, 24 Oct 2023 02:46:24 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-408002b5b9fso35123195e9.3 for ; Tue, 24 Oct 2023 02:46:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1698140783; x=1698745583; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=YxL8IXJxK6nZZcgY+jbWAe4cJBK0AaStast6oXjM8uc=; b=JBFbsdHMLjiHsJfN23h/bL5/bZRN5STqMmEVkurOvghVyYdEICgOCzcvTWXIEVGybU jxlJ28SP2aXJvetZ/UhRPTqZOlungmIj1DnPAHPInpxAC7i+BktNQoKpZQfy9mU1egfD KQQljiW/f0enPiiwJEilVXpjL6BA3TPIR/+1xcpFl4vyecgxX7QnfvY4jEAWK2Ts71Wp RoRWVy8Z2IlYjqeAo/ITtV+9dQyxBSNX11T9+TI2aFoDgqarFQ2m/PeEUBwOLW0fDLNK OSgTH3w34Jsqk8kmrhJLTFvSfn8HruEI5QFtEjWWHWXlyIMFqi5xicYAOVP0rzYO2LGO LcdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698140783; x=1698745583; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=YxL8IXJxK6nZZcgY+jbWAe4cJBK0AaStast6oXjM8uc=; b=dr6Qku+aqGRcF6e4Qi6ttpcXe2py2xBmqzyjQjz0F2JVVYQgl5UlHmv2KCP0tZxBiU ccJgLl6huQAERgHEMeiSdUpnjNNOE49CQkYKx5zKHjnmT6AF1q0a64penN8Bj4BdrMnt 8LvQckM+fu8g1M1xKh9gEyV1ury860CL2XOuigD3sZm/xdd+qbLqd2RG2XfDjRLSh6n3 C8ksnCaLZSQ5lpfcVqCOzRemtjxlk/Ogd5BSYiy8tMjqIzMnpFnrC9vijqlWW22Bf2p8 tEJEW0Z4CEX4xLgNIDWOqrwHdBHEQaZT+CYLbRh2yUeFMmSZMmpwvFvhrBu0xLsO3s6m VBXA== X-Gm-Message-State: AOJu0YwWJn3Kq5pFkj3re/1ZM0FHiDnfgLLpvkG/AZ2Bj/8gjP5gxMMi 1dYEP+klFp2oLXQS3z6CsTD5ew== X-Received: by 2002:a7b:c8c2:0:b0:409:101e:235a with SMTP id f2-20020a7bc8c2000000b00409101e235amr901405wml.28.1698140782643; Tue, 24 Oct 2023 02:46:22 -0700 (PDT) Received: from [192.168.1.172] ([93.5.22.158]) by smtp.gmail.com with ESMTPSA id r8-20020adff108000000b0032db1d741a6sm9602052wro.99.2023.10.24.02.46.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Oct 2023 02:46:22 -0700 (PDT) Message-ID: <314a5b37-bdc4-41d1-a3de-c6d557628be9@baylibre.com> Date: Tue, 24 Oct 2023 11:46:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 4/4] arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile Content-Language: en-US To: Chen-Yu Tsai Cc: Jason-ch Chen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Eugen Hristev , Bartosz Golaszewski , =?UTF-8?Q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org References: <20231023083839.24453-1-jason-ch.chen@mediatek.com> <20231023083839.24453-5-jason-ch.chen@mediatek.com> From: Alexandre Mergnat In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 24 Oct 2023 02:46:36 -0700 (PDT) On 24/10/2023 11:36, Chen-Yu Tsai wrote: > Hi, > > On Mon, Oct 23, 2023 at 6:55 PM Alexandre Mergnat wrote: >> >> >> >> On 23/10/2023 10:38, Jason-ch Chen wrote: >>> From: jason-ch chen >>> >>> MT8188 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 >>> and 2 CA78 cores. MT8188 share many HW IP with MT65xx series. >>> >>> We add basic chip support for MediaTek MT8188 on evaluation board. >>> >>> Signed-off-by: jason-ch chen >>> --- >>> arch/arm64/boot/dts/mediatek/Makefile | 1 + >>> arch/arm64/boot/dts/mediatek/mt8188-evb.dts | 387 ++++++++ >>> arch/arm64/boot/dts/mediatek/mt8188.dtsi | 956 ++++++++++++++++++++ >>> 3 files changed, 1344 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-evb.dts >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8188.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile >>> index e6e7592a3645..8900b939ed52 100644 >>> --- a/arch/arm64/boot/dts/mediatek/Makefile >>> +++ b/arch/arm64/boot/dts/mediatek/Makefile >>> @@ -44,6 +44,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-evb.dtb >>> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-evb.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r1.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r5-sku2.dtb >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-spherion-r0.dtb ..snip.. >> >> Order: >> >> >> #address-cells = <1>; >> #size-cells = <0>; >> >> pinctrl-0 = <&nor_pins_default>; >> pinctrl-names = "default"; > > I think pinctrl-names before pinctrl-* makes more sense. We declare the > names and by extension how many pinctrl-N entries are needed first. The > vast majority of the arm64 device tree files have pinctrl-names before > pinctrl-N. The only platform that exclusively has pinctrl-N before > pinctrl-names is amlogic. > AFAIK, people have it own logic explanation to justify order. Personally, I use the dumb and generic one: pack related properties and alphabetical order. Anyway, I don't have strong opinion of that > If there's a preference for a particular order platform-wide or tree-wide > then it should probably be documented somewhere? > I'm agree >> status = "okay"; > > I think #address-cells and #size-cells belong at the end of the list, > even after "status", just before any child nodes. They describe > properties or requirements for the child nodes, not for the node they > sit in. > >>> + >>> + flash@0 { >>> + compatible = "jedec,spi-nor"; >>> + reg = <0>; >>> + spi-max-frequency = <52000000>; >>> + }; >>> +}; >>> + >> >> ..snip.. >> >>> + >>> +&pmic { >>> + interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; >>> +}; >>> + >>> +&scp { >>> + memory-region = <&scp_mem_reserved>; >>> + status = "okay"; >>> +}; >>> + >>> +&spi0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&spi0_pins>; >> >> Order: >> >> pinctrl-0 = <&spi0_pins>; >> pinctrl-names = "default"; >> >> Please apply this to other nodes > > See above. > > ChenYu > >>> + status = "okay"; >>> +}; >>> + >>> +&spi1 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&spi1_pins>; >>> + status = "okay"; >>> +}; >>> + >>> +&spi2 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&spi2_pins>; >>> + status = "okay"; >>> +}; >>> + >>> +&u3phy0 { >>> + status = "okay"; >>> +}; >>> + >>> +&u3phy1 { >>> + status = "okay"; >>> +}; >>> + >>> +&u3phy2 { >>> + status = "okay"; >>> +}; >>> + >>> +&uart0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&uart0_pins>; >>> + status = "okay"; >>> +}; >>> + >> >> ..snip.. >> >>> + }; >>> + }; >>> +}; >> >> After that: >> Reviewed-by: Alexandre Mergnat >> >> -- >> Regards, >> Alexandre -- Regards, Alexandre