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Wysocki" , Rob Herring , Fang Xiang , bahle@ibv-augsburg.de, rath@ibv-augsburg.de Subject: Re: [PATCH v3 3/5] irqchip/gic-v3-its: Split allocation from initialisation of its_node In-Reply-To: <20231024084831.GA3788@JADEVM-DRA> References: <20230905104721.52199-1-lpieralisi@kernel.org> <20231006125929.48591-1-lpieralisi@kernel.org> <20231006125929.48591-4-lpieralisi@kernel.org> <20231024084831.GA3788@JADEVM-DRA> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: dominic.rath@ibv-augsburg.net, lpieralisi@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, mark.rutland@arm.com, robin.murphy@arm.com, rafael@kernel.org, robh+dt@kernel.org, fangxiang3@xiaomi.com, bahle@ibv-augsburg.de, rath@ibv-augsburg.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 24 Oct 2023 03:18:36 -0700 (PDT) On Tue, 24 Oct 2023 09:48:31 +0100, Dominic Rath wrote: >=20 > Hi, >=20 > On Fri, Oct 06, 2023 at 02:59:27PM +0200, Lorenzo Pieralisi wrote: > > From: Marc Zyngier > >=20 > > In order to pave the way for more fancy quirk handling without making > > more of a mess of this terrible driver, split the allocation of the > > ITS descriptor (its_node) from the actual probing. >=20 > it seems that this change breaks MSI-X (MSI?) reception on at least > the TI AM64x, probably most/all of TI's recent devices (K3). >=20 > These devices rely on a quirk CONFIG_SOCIONEXT_SYNQUACER_PREITS that > uses an address from the dts specified e.g. as >=20 > socionext,synquacer-pre-its =3D <0x1000000 0x400000>; >=20 > to configure a MSI base address that differs from the ARM default. Why on Earth are people using a property that is specific to another implementation? Not only the HW is braindead, but this is now tied to whatever additional implementation quirks we find... This is just dumb. > With this change, the quirk still sets its->get_msi_base and clears > IRQ_DOMAIN_FLAG_ISOLATED_MSI from its->msi_domain_flags during > its_of_probe, but both get overwritten again during its_probe_one > with the defaults. >=20 > Previously the defaults would be set first and then the quirks were > applied. Yeah, that's clearly a regression, and I've confirmed it on my Synquacer (which means the TI folks have accurately copied a dumb idea). Can you please give the patch below a go on your system and confirm asap whether it works for you? > I have no idea whether TI's use of this quirk was "correct", but it did > work, and since 6.6-rc6 MSI-X has been broken for us. Just as for bad SW, the worse HW ideas get replicated. Then I write bad SW for it. Thanks, M. =46rom b5571a69f09733ecfa0c944cc48baced6590d024 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Tue, 24 Oct 2023 11:07:34 +0100 Subject: [PATCH] irqchip/gic-v3-its: Don't override quirk settings with default values When splitting the allocation of the ITS node from its configuration, some of the default settings were kept in the latter instead of being moved to the former. This has the side effect of negating some of the quirk detection that have happened in between, amongst which the dreaded Synquacer hack (that also affect Dominic's TI platform). Move the initialisation of these fields early, so that they can again be overriden by the Synquacer quirk. Fixes: 9585a495ac93 ("irqchip/gic-v3-its: Split allocation from initialisat= ion of its_node") Reported by: Dominic Rath Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20231024084831.GA3788@JADEVM-DRA --- drivers/irqchip/irq-gic-v3-its.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-= its.c index 75a2dd550625..a8c89df1a997 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -5112,8 +5112,6 @@ static int __init its_probe_one(struct its_node *its) } its->cmd_base =3D (void *)page_address(page); its->cmd_write =3D its->cmd_base; - its->get_msi_base =3D its_irq_get_msi_base; - its->msi_domain_flags =3D IRQ_DOMAIN_FLAG_ISOLATED_MSI; =20 err =3D its_alloc_tables(its); if (err) @@ -5362,6 +5360,8 @@ static struct its_node __init *its_node_init(struct r= esource *res, its->typer =3D gic_read_typer(its_base + GITS_TYPER); its->base =3D its_base; its->phys_base =3D res->start; + its->get_msi_base =3D its_irq_get_msi_base; + its->msi_domain_flags =3D IRQ_DOMAIN_FLAG_ISOLATED_MSI; =20 its->numa_node =3D numa_node; its->fwnode_handle =3D handle; --=20 2.39.2 --=20 Without deviation from the norm, progress is not possible.