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 <20231023172800.315343-8-apatel@ventanamicro.com> <20231024-arbitrate-glitter-2053d17d7260@spud>
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From:   Anup Patel <apatel@ventanamicro.com>
Date:   Tue, 24 Oct 2023 17:38:28 +0530
Message-ID: <CAK9=C2UxD1uKCvg26xzevtm4MAeGix-qS9PM296uCg3NqSyTaA@mail.gmail.com>
Subject: Re: [PATCH v11 07/14] irqchip: Add RISC-V incoming MSI controller
 early driver
To:     Conor Dooley <conor@kernel.org>
Cc:     Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Frank Rowand <frowand.list@gmail.com>,
        Conor Dooley <conor+dt@kernel.org>,
        Marc Zyngier <maz@kernel.org>,
        =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>,
        Atish Patra <atishp@atishpatra.org>,
        Andrew Jones <ajones@ventanamicro.com>,
        Sunil V L <sunilvl@ventanamicro.com>,
        Saravana Kannan <saravanak@google.com>,
        Anup Patel <anup@brainfault.org>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org
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On Tue, Oct 24, 2023 at 2:55=E2=80=AFPM Conor Dooley <conor@kernel.org> wro=
te:
>
> On Mon, Oct 23, 2023 at 10:57:53PM +0530, Anup Patel wrote:
>
> > +#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
> > +void imsic_vector_debug_show(struct seq_file *m,
> > +                          struct imsic_vector *vec, int ind)
> > +{
> > +     unsigned int mcpu =3D 0, mlocal_id =3D 0;
> > +     struct imsic_local_priv *lpriv;
> > +     bool move_in_progress =3D false;
> > +     struct imsic_vector *mvec;
> > +     bool is_enabled =3D false;
> > +     unsigned long flags;
> > +
> > +     lpriv =3D per_cpu_ptr(imsic->lpriv, vec->cpu);
> > +     if (WARN_ON(&lpriv->vectors[vec->local_id] !=3D vec))
> > +             return;
> > +
> > +     raw_spin_lock_irqsave(&lpriv->ids_lock, flags);
> > +     if (test_bit(vec->local_id, lpriv->ids_enabled_bitmap))
> > +             is_enabled =3D true;
> > +     mvec =3D lpriv->ids_move[vec->local_id];
> > +     if (mvec) {
> > +             move_in_progress =3D true;
> > +             mcpu =3D mvec->cpu;
> > +             mlocal_id =3D mvec->local_id;
> > +     }
> > +     raw_spin_unlock_irqrestore(&lpriv->ids_lock, flags);
> > +
> > +     seq_printf(m, "%*starget_cpu      : %5u\n", ind, "", vec->cpu);
> > +     seq_printf(m, "%*starget_local_id : %5u\n", ind, "", vec->local_i=
d);
> > +     seq_printf(m, "%*sis_reserved     : %5u\n", ind, "",
> > +                (vec->local_id <=3D IMSIC_IPI_ID) ? 1 : 0);
>
> > +     seq_printf(m, "%*sis_enabled      : %5u\n", ind, "",
> > +                (move_in_progress) ? 1 : 0);
>
> gcc & clang report:
> drivers/irqchip/irq-riscv-imsic-state.c:288:14: warning: variable 'is_ena=
bled' set but not used [-Wunused-but-set-variable]
>
> This looks to be a copy-pasta issue, and the move_in_progress here
> should be is_enabled?

Thanks for catching. Strangely,  I did not see this warning with
the toolchain which I use.

I will fix it in the next patch revision.

Regards,
Anup

>
> > +     seq_printf(m, "%*sis_move_pending : %5u\n", ind, "",
> > +                (move_in_progress) ? 1 : 0);
> > +     if (move_in_progress) {
> > +             seq_printf(m, "%*smove_cpu        : %5u\n", ind, "", mcpu=
);
> > +             seq_printf(m, "%*smove_local_id   : %5u\n", ind, "", mloc=
al_id);
> > +     }
> > +}