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[23.128.96.38]) by mx.google.com with ESMTPS id kb11-20020a17090ae7cb00b00276571c0d34si8924197pjb.6.2023.10.24.07.09.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 07:09:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=2wTaohei; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=lunn.ch Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 69C1880275A9; Tue, 24 Oct 2023 07:09:00 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343513AbjJXOIr (ORCPT + 99 others); Tue, 24 Oct 2023 10:08:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234210AbjJXOIq (ORCPT ); Tue, 24 Oct 2023 10:08:46 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1193A3; Tue, 24 Oct 2023 07:08:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=eDhesMhiwtf5oRFEe0tcbmQl0LJ8NdA55Y6empsfy2E=; b=2wTaoheinvFFan+20dLH3nGj5o mtfWlWEKM8LyBNDOp+/JH7uDIycqEZtgXmeSlPZk3qP5zsH7TMOjFNf4ytimoM16XLKvRbaSVybhL 3ojnbBDMDu0/yiXSz7A5Xgu/xZi7OwNLheXWaf/4b7wdxXlzWMd9ZrOUMM17ZI35SsPY=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1qvI59-0004xO-Ki; Tue, 24 Oct 2023 16:08:31 +0200 Date: Tue, 24 Oct 2023 16:08:31 +0200 From: Andrew Lunn To: Romain Gantois Cc: davem@davemloft.net, Rob Herring , Krzysztof Kozlowski , Jakub Kicinski , Eric Dumazet , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Vladimir Oltean , Luka Perkov , Robert Marko , Andy Gross , Bjorn Andersson , Konrad Dybcio , Maxime Chevallier Subject: Re: [PATCH net-next 3/5] net: ipqess: introduce the Qualcomm IPQESS driver Message-ID: <932bef01-b498-4c1a-a7f4-3357fe94e883@lunn.ch> References: <20231023155013.512999-1-romain.gantois@bootlin.com> <20231023155013.512999-4-romain.gantois@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 24 Oct 2023 07:09:00 -0700 (PDT) > > > + for (c = 0; c < priv->info->mib_count; c++) { > > > + mib = &ar8327_mib[c]; > > > + reg = QCA8K_PORT_MIB_COUNTER(port->index) + mib->offset; > > > + > > > + ret = qca8k_read(priv, reg, &val); > > > + if (ret < 0) > > > + continue; > > > > Given the switch is built in, is this fast? The 8k driver avoids doing > > register reads for this. > > Sorry, I don't quite understand what you mean. Are you referring to the existing > QCA8k DSA driver? From what I've seen, it calls qca8k_get_ethtool_stats defined > in qca8k-common.c and this uses the same register read. It should actually build an Ethernet frame containing a command to get most of the statistics in one operation. That frame is sent to the switch over the SoCs ethernet interface. The switch replies with a frame containing the statistics. This should be faster than doing lots of register reads over a slow MDIO bus. Now, given that this switch is built into the SoC, i assume the MDIO bus is gone, so register access is fast. So you don't need to use Ethernet frames. Andrew