Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37;
MIME-Version: 1.0
References: <20231023155013.512999-1-romain.gantois@bootlin.com>
 <20231023155013.512999-4-romain.gantois@bootlin.com> <b8ac3558-b6f0-4658-b406-8ceba062a52c@lunn.ch>
 <f4e6dcee-23cf-bf29-deef-cf876e63bb8a@bootlin.com> <932bef01-b498-4c1a-a7f4-3357fe94e883@lunn.ch>
In-Reply-To: <932bef01-b498-4c1a-a7f4-3357fe94e883@lunn.ch>
From:   Robert Marko <robert.marko@sartura.hr>
Date:   Tue, 24 Oct 2023 18:23:58 +0200
Message-ID: <CA+HBbNHb2RF3tfDYRTG6AndhmW1U4tvFmiC+rhYwH8SCLqSUzw@mail.gmail.com>
Subject: Re: [PATCH net-next 3/5] net: ipqess: introduce the Qualcomm IPQESS driver
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Romain Gantois <romain.gantois@bootlin.com>, davem@davemloft.net,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        Paolo Abeni <pabeni@redhat.com>, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        thomas.petazzoni@bootlin.com,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org,
        Vladimir Oltean <vladimir.oltean@nxp.com>,
        Luka Perkov <luka.perkov@sartura.hr>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Maxime Chevallier <maxime.chevallier@bootlin.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Tue, Oct 24, 2023 at 4:08=E2=80=AFPM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > > > + for (c =3D 0; c < priv->info->mib_count; c++) {
> > > > +         mib =3D &ar8327_mib[c];
> > > > +         reg =3D QCA8K_PORT_MIB_COUNTER(port->index) + mib->offset=
;
> > > > +
> > > > +         ret =3D qca8k_read(priv, reg, &val);
> > > > +         if (ret < 0)
> > > > +                 continue;
> > >
> > > Given the switch is built in, is this fast? The 8k driver avoids doin=
g
> > > register reads for this.
> >
> > Sorry, I don't quite understand what you mean. Are you referring to the=
 existing
> > QCA8k DSA driver? From what I've seen, it calls qca8k_get_ethtool_stats=
 defined
> > in qca8k-common.c and this uses the same register read.
>
> It should actually build an Ethernet frame containing a command to get
> most of the statistics in one operation. That frame is sent to the
> switch over the SoCs ethernet interface. The switch replies with a
> frame containing the statistics. This should be faster than doing lots
> of register reads over a slow MDIO bus.
>
> Now, given that this switch is built into the SoC, i assume the MDIO
> bus is gone, so register access is fast. So you don't need to use
> Ethernet frames.

It is being accessed as regular MMIO so the MDIO bottleneck is not present,
so we never tried if the special ethernet packets are even support, especia=
lly
since the tag is completely different from that in regular qca8k switches.

Regards,
Robert
>
>          Andrew


--=20
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@sartura.hr
Web: www.sartura.hr