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Tue, 24 Oct 2023 19:55:13 -0700 (PDT) Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) for TPDM. It specifies the number of CMB MSR registers supported by the TDPM. Signed-off-by: Tao Zhang Signed-off-by: Mao Jinlong --- Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index f9a2025..a586b80a 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -69,6 +69,15 @@ properties: minimum: 0 maximum: 32 + qcom,cmb-msrs-num: + description: + Specifies the number of CMB MSR(mux select register) registers supported + by the monitor. If this property is not configured or set to 0, it means + this TPDM doesn't support CMB MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + clocks: maxItems: 1 @@ -124,6 +133,7 @@ examples: reg-names = "tpdm-base"; qcom,cmb-element-size = /bits/ 8 <64>; + qcom,cmb-msrs-num = <32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; -- 2.7.4