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Wed, 25 Oct 2023 00:33:54 -0700 (PDT) From: Neil Armstrong Subject: [PATCH 0/3] pinctrl: qcom: Introduce Pinctrl/GPIO for SM8650 Date: Wed, 25 Oct 2023 09:33:50 +0200 Message-Id: <20231025-topic-sm8650-upstream-tlmm-v1-0-4e3d84a3a46b@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAN7EOGUC/x3MQQqDMBAF0KvIrB1IjIrtVaQLSb/tgNGQiUUQ7 27o8m3eSYokUHpWJyX8RGVbC2xdkf9O6wcs72JqTOOssT3nLYpnDUPfGd6j5oQpcF5C4BYerms xO/ugEsSEWY5/Pr6u6wZZtdWGbAAAAA== To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1637; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=m6+6Lw3b6NzvC5o8Z3ERp2+18RGFKp8bBRONhG0avNo=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlOMTgAlruNS1Xcec/bkmeC0l8C8zHe5uu+bo/fkMr OfLTmzSJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZTjE4AAKCRB33NvayMhJ0WvED/ 4k4lo3g57mR+I5gMlRF8hq+LgocRZt+Qi8q+BZhwdi01zYN7N12x4ooMr1p7L2Z+Gl7drFBC9x7+Y7 l6CC3lpS3HFuzVHDCm8KhEU1ddbTiZtDXkMgTEA+27fFYDGagCRW9ojuxaJmvNcOWgzJBAZI+9ChKA Zfg/NNXVf/iMEuMQ5Qafy6vpfH4e8cKrfwxgbC6LDpP2e1A0TwDIxBtu275c5QGAZEDHvRnP3Q5vih Z0XtdQfzN4axUvLw5VU8SzkW61eAbWTxwNsN5sQYLPheU21uQKHeaeUCJXIjSk7JIpvngQVk8kaNBz JhE8KCFBDnHbRJiDN7I7rD/YB3N/2ItoJWBnlxLyrMvabPLs4gGJtwTrmDhHsXjY/Iz1jQORNhC1ft MWsvA7h8EnZ15ZziQyO7Vf9xpO/OcfKFTRZ3M9VqBPeMBHvD3YmIpvBvuiONoEv/WTPRyf6zVrMSym 5uHbSQj7ob8i4+amZuKX7VBrOfUdeq28hTmD9ZgCqeTFYkupsjqY1Px/pRGYqvSPfHRcZ9s716mosQ AlQfRdwnZgPPzE1RW47lVaaTY+Q4G/+K729ysryMxivgK7UdKo7AaIvKP6egiXCIE14JHkd2PRd8om h/NPl4Pe3l7EJw7Y4K524o5Ge+2Nuyt+3KGMReOQ8EGRCufgAOk66Xvuai4g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 25 Oct 2023 00:36:09 -0700 (PDT) The SM8650 Top Level Mode Multiplexer supports 211 GPIOs, and the usual UFS Reset, SDC Clk/Cmd/Data special pins. An handful of pins can have their IRQ generated by the PDC module, and for this support for the new wakeup_present & wakeup_enable_bit is required to allow the "wakeup" event to be passed to PDC and generate an interrupt or a wakeup system event. As SM8550, it also supports the i2c_pull_bit bit to enable the on-SoC load resistor for I2C busses. Dependencies: None For convenience, a regularly refreshed linux-next based git tree containing all the SM8650 related work is available at: https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm85650/upstream/integ Signed-off-by: Neil Armstrong --- Neil Armstrong (3): dt-bindings: pinctrl: document the SM8650 Top Level Mode Multiplexer pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver .../bindings/pinctrl/qcom,sm8650-tlmm.yaml | 157 ++ drivers/pinctrl/qcom/Kconfig.msm | 8 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-msm.c | 32 + drivers/pinctrl/qcom/pinctrl-msm.h | 5 + drivers/pinctrl/qcom/pinctrl-sm8650.c | 1762 ++++++++++++++++++++ 6 files changed, 1965 insertions(+) --- base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc change-id: 20231016-topic-sm8650-upstream-tlmm-4ece354ef319 Best regards, -- Neil Armstrong