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From:   Ankit Agrawal <ankita@nvidia.com>
To:     "Tian, Kevin" <kevin.tian@intel.com>,
        Alex Williamson <alex.williamson@redhat.com>
CC:     Jason Gunthorpe <jgg@nvidia.com>,
        Yishai Hadas <yishaih@nvidia.com>,
        "shameerali.kolothum.thodi@huawei.com" 
        <shameerali.kolothum.thodi@huawei.com>,
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        Kirti Wankhede <kwankhede@nvidia.com>,
        "Tarun Gupta (SW-GPU)" <targupta@nvidia.com>,
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        Dan Williams <danw@nvidia.com>,
        "Anuj Aggarwal (SW-GPU)" <anuaggarwal@nvidia.com>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
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Subject: Re: [PATCH v12 1/1] vfio/nvgpu: Add vfio pci variant module for grace
 hopper
Thread-Topic: [PATCH v12 1/1] vfio/nvgpu: Add vfio pci variant module for
 grace hopper
Thread-Index: AQHZ/4T6dPreO49caEWsaHN/ceuQqrBOmsSAgAi/5YSAACTLAIABhTmtgAAJHQCAAS20AIAAOkSM
Date:   Wed, 25 Oct 2023 12:43:24 +0000
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While the physical BAR is present on the device, it is not being used on th=
e host=0A=
system. The access to the device memory region on the host occur through th=
e=0A=
C2C interconnect link (not the PCIe) and is present for access as a separat=
e memory=0A=
region in the physical address space on the host. The variant driver querie=
s this range=0A=
from the host ACPI DSD tables.=0A=
=0A=
Now, this device memory region on the host is exposed as a device BAR in th=
e VM.=0A=
So the device BAR in the VM is actually mapped to the device memory region =
in the=0A=
physical address space (and not to the physical BAR) on the host. The confi=
g space=0A=
accesses to the device however, are still going to the physical BAR on the =
host.=0A=
=0A=
> Does this BAR2 size match the size we're reporting for the region?=A0 Now=
=0A=
> I'm confused why we need to intercept the BAR2 region info if there's=0A=
> physically a real BAR behind it.=A0 Thanks,=0A=
=0A=
Yes, it does match the size being reported through region info. But the reg=
ion=0A=
info ioctl is still intercepted to provide additional cap to establish the =
sparse=0A=
mapping. Why we do sparse mapping? The actual device memory size is not=0A=
power-of-2 aligned (a requirement for a BAR). So we roundup to the next=0A=
power-of-2 value and report the size as such. Then we utilize sparse mappin=
g=0A=
to show only the actual size of the device memory as mappable.=0A=
=0A=