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Date:   Wed, 25 Oct 2023 15:30:27 +0100
From:   Conor Dooley <conor@kernel.org>
To:     "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
        sboyd@kernel.org, abelvesa@kernel.org, kernel@pengutronix.de,
        festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH V3 1/2] dt-bindings: clock: support i.MX93 Analog clock
 module
Message-ID: <20231025-segment-musky-82f53da16355@spud>
References: <20231025072242.1134090-1-peng.fan@oss.nxp.com>
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On Wed, Oct 25, 2023 at 03:22:41PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>=20
> Support i.MX93 Analog module which produces PLL and OSC for Clock
> Controller Module
>=20
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

> ---
> V3:
>  Rename back to fsl,imx93-anatop.yaml
>=20
> V2:
>  Update subject and commit, rename file to fsl,imx93-analog.yaml
>=20
>  .../bindings/clock/fsl,imx93-anatop.yaml      | 42 +++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx93-ana=
top.yaml
>=20
> diff --git a/Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yam=
l b/Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml
> new file mode 100644
> index 000000000000..5d696ccc8986
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX93 Analog Clock Module
> +
> +maintainers:
> +  - Peng Fan <peng.fan@nxp.com>
> +
> +description: |
> +  NXP i.MX93 Analog module which produces PLL and OSC to Clock Controller
> +  Module.

As I mentioned before, the module contains a PLL and an oscillator, it
doesn't produce them.

Cheers,
Conor.

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