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[23.128.96.35]) by mx.google.com with ESMTPS id j66-20020a816e45000000b005a7bbd713e2si11997465ywc.397.2023.10.25.14.46.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 14:46:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=jwAbudX9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 07319802AA03; Wed, 25 Oct 2023 14:46:20 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229738AbjJYVqD (ORCPT + 99 others); Wed, 25 Oct 2023 17:46:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229649AbjJYVqB (ORCPT ); Wed, 25 Oct 2023 17:46:01 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D436133; Wed, 25 Oct 2023 14:46:00 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8FB8DC433C7; Wed, 25 Oct 2023 21:45:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1698270359; bh=D7K9D5FkQxgI+SxQC2ZWcKW+hmigiiDTP+3F/4Ccoos=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=jwAbudX9bC9v0VbbXMfuHgmVqzQuXUqOLU4dWO87PvFwb66c9JF6EgyOGqeih7bFH q2p1WxFlZKTO+rZjt6AbBHWETd6deW6TIHCCwSAmXK1kRu8Z8d9vKc57NVM1RFD0nI L5uSZMNQyxs4/aZBM+y7/J0HixEBFgODVTU8C9b72h5GFif1AK+AMT9KfNvldB9eWr e2PgGWY/WL9bdWHOfmbOlzzGxTQoo1V3sLhkU9fnF/uwSjHIkx6ewHc4Y3znTDQcrB yEbKCuKGrzhc17pwd0MoFyzRx/LpCBR5+iWCJNqlZsbJBPSTo3mscgBR/vRo6YVXA6 z0PblSkximmiw== Message-ID: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20231025-topic-sm8650-upstream-clocks-v1-8-c89b59594caf@linaro.org> References: <20231025-topic-sm8650-upstream-clocks-v1-0-c89b59594caf@linaro.org> <20231025-topic-sm8650-upstream-clocks-v1-8-c89b59594caf@linaro.org> Subject: Re: [PATCH 08/10] clk: qcom: add the SM8650 Display Clock Controller driver From: Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong To: Andy Gross , Bjorn Andersson , Conor Dooley , Konrad Dybcio , Krzysztof Kozlowski , Michael Turquette , Neil Armstrong , Philipp Zabel , Rob Herring , Taniya Das Date: Wed, 25 Oct 2023 14:45:57 -0700 User-Agent: alot/0.10 X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 25 Oct 2023 14:46:20 -0700 (PDT) Quoting Neil Armstrong (2023-10-25 00:32:45) > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > index c04b6526f4f3..5bf25e8d033c 100644 > --- a/drivers/clk/qcom/Kconfig > +++ b/drivers/clk/qcom/Kconfig > @@ -842,6 +842,15 @@ config SM_DISPCC_8550 > Say Y if you want to support display devices and functionality = such as > splash screen. > =20 > +config SM_DISPCC_8650 > + tristate "SM8650 Display Clock Controller" > + depends on SM_GCC_8650 selects? We use selects instead of depends so that the driver can be built-in or modular regardless of parent clks that provide clks to this device. Orphan clk handling resolves issues with the driver registering clks before parents. And with fw_devlink the driver isn't even attempted to probe before the GCC driver is probed so there's no build dependency between these drivers. > + help > + Support for the display clock controller on Qualcomm Technologi= es, Inc > + SM8650 devices. > + Say Y if you want to support display devices and functionality = such as > + splash screen. > + > config SM_GCC_4450 > tristate "SM4450 Global Clock Controller" > depends on ARM64 || COMPILE_TEST > diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-s= m8650.c > new file mode 100644 > index 000000000000..7cb91306e895 > --- /dev/null > +++ b/drivers/clk/qcom/dispcc-sm8650.c > @@ -0,0 +1,1806 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2021, The Linux Foundation. All rights reserved. > + * Copyright (c) 2023, Linaro Ltd. > + */ > + > +#include Is this include used? > +#include > +#include > +#include > +#include > +#include Is this mod_devicetable.h? > +#include Is this include used? > +#include > +#include > + > +#include > + > +#include "common.h" > +#include "clk-alpha-pll.h" > +#include "clk-branch.h" > +#include "clk-pll.h" > +#include "clk-rcg.h" > +#include "clk-regmap.h" > +#include "clk-regmap-divider.h" > +#include "clk-regmap-mux.h" Is this include used? > +#include "reset.h" > +#include "gdsc.h" > +