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Date:   Thu, 26 Oct 2023 14:27:33 +1100
From:   Stephen Rothwell <sfr@canb.auug.org.au>
To:     Jason Gunthorpe <jgg@nvidia.com>, Joerg Roedel <joro@8bytes.org>
Cc:     Jason Gunthorpe <jgg@ziepe.ca>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linux Next Mailing List <linux-next@vger.kernel.org>,
        Michael Shavit <mshavit@google.com>,
        Tina Zhang <tina.zhang@intel.com>,
        Will Deacon <will@kernel.org>
Subject: linux-next: manual merge of the iommufd tree with the iommu tree
Message-ID: <20231026142733.442e18a5@canb.auug.org.au>
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Hi all,

Today's linux-next merge of the iommufd tree got a conflict in:

  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

between commit:

  24503148c545 ("iommu/arm-smmu-v3: Refactor write_ctx_desc")

from the iommu tree and commit:

  a247f322787d ("iommu: Add mm_get_enqcmd_pasid() helper function")

from the iommufd tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

--=20
Cheers,
Stephen Rothwell

diff --cc drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
index 353248ab18e7,08fac84c1804..000000000000
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
@@@ -264,10 -233,10 +264,10 @@@ static void arm_smmu_mm_release(struct=20
  	 * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events,
  	 * but disable translation.
  	 */
- 	arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, &quiet_cd);
 -	arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), &quiet_cd);
++	arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), &=
quiet_cd);
 =20
  	arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid);
- 	arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0);
+ 	arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0);
 =20
  	smmu_mn->cleared =3D true;
  	mutex_unlock(&sva_lock);
@@@ -323,16 -290,7 +323,16 @@@ arm_smmu_mmu_notifier_get(struct arm_sm
  		goto err_free_cd;
  	}
 =20
 -	ret =3D arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), cd=
);
 +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
 +	list_for_each_entry(master, &smmu_domain->devices, domain_head) {
- 		ret =3D arm_smmu_write_ctx_desc(master, mm->pasid, cd);
++		ret =3D arm_smmu_write_ctx_desc(master, mm_get_enqcmd_pasid(mm), cd);
 +		if (ret) {
 +			list_for_each_entry_from_reverse(master, &smmu_domain->devices, domain=
_head)
- 				arm_smmu_write_ctx_desc(master, mm->pasid, NULL);
++				arm_smmu_write_ctx_desc(master, mm_get_enqcmd_pasid(mm), NULL);
 +			break;
 +		}
 +	}
 +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
  	if (ret)
  		goto err_put_notifier;
 =20
@@@ -357,8 -315,7 +357,8 @@@ static void arm_smmu_mmu_notifier_put(s
  		return;
 =20
  	list_del(&smmu_mn->list);
 -	arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), NULL);
 +
- 	arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, NULL);
++	arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), N=
ULL);
 =20
  	/*
  	 * If we went through clear(), we've already invalidated, and no

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