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Thu, 26 Oct 2023 06:59:47 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39Q6xlJ0009877 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 26 Oct 2023 06:59:47 GMT Received: from [10.216.45.182] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 25 Oct 2023 23:59:34 -0700 Message-ID: <23f3f2a8-dcbd-6764-195b-49bcec451084@quicinc.com> Date: Thu, 26 Oct 2023 12:29:30 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v3 2/5] PCI: qcom-ep: Add support for SA8775P SOC Content-Language: en-US To: Manivannan Sadhasivam CC: , , , , , , , , , , , , , , Bjorn Helgaas , "Lorenzo Pieralisi" , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Kishon Vijay Abraham I , Vinod Koul , , , , , , References: <1697715430-30820-1-git-send-email-quic_msarkar@quicinc.com> <1697715430-30820-3-git-send-email-quic_msarkar@quicinc.com> <20231025075317.GC3648@thinkpad> <20231026061035.GA4915@thinkpad> From: Mrinmay Sarkar In-Reply-To: <20231026061035.GA4915@thinkpad> Content-Type: text/plain; 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Thu, 26 Oct 2023 00:00:22 -0700 (PDT) On 10/26/2023 11:40 AM, Manivannan Sadhasivam wrote: > On Thu, Oct 26, 2023 at 11:08:03AM +0530, Mrinmay Sarkar wrote: >> On 10/25/2023 1:23 PM, Manivannan Sadhasivam wrote: >>> On Thu, Oct 19, 2023 at 05:07:07PM +0530, Mrinmay Sarkar wrote: >>>> Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller >>>> driver. There will be some change specific to SA8775P so adding new >>>> compatible string. >>>> >>> What are those specific changes? >>> >>> - Mani >> Need to enable cache snooping logic for SA8775P only. >> > Then you can add the compatible to the driver at that time and use the fallback > till then i.e., just document the SA8775P compatible in bindings and use both > SA8775P and SM8450 compatibles in the dts where the latter will act as a > fallback. > > - Mani I am getting below error in dtb checking if I add SM8450 as fallback compatible in dtsi. As both has different set of clocks. //local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: compatible: 'oneOf' conditional failed, one must be fixed:// //        ['qcom,sa8775p-pcie-ep', 'qcom,sm8450-pcie-ep'] is too long// //        'qcom,sdx65-pcie-ep' was expected// //        'qcom,sdx55-pcie-ep' was expected// //        from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: clocks: [[31, 66], [31, 68], [31, 69], [31, 78], [31, 79]] is too short// //        from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#// ///local/mnt/workspace/Mrinmay/new_lemans/next-20231018/linux-next/out/arch/arm64/boot/dts/qcom/sa8775p-ride.dtb: pcie-ep@1c00000: clock-names: ['aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a'] is too short/ >> --Mrinmay >> >>>> Signed-off-by: Mrinmay Sarkar >>>> --- >>>> drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> index 32c8d9e..4c01c34 100644 >>>> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c >>>> @@ -858,6 +858,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) >>>> } >>>> static const struct of_device_id qcom_pcie_ep_match[] = { >>>> + { .compatible = "qcom,sa8775p-pcie-ep", }, >>>> { .compatible = "qcom,sdx55-pcie-ep", }, >>>> { .compatible = "qcom,sm8450-pcie-ep", }, >>>> { } >>>> -- >>>> 2.7.4 >>>>