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Received: from VE1PR08MB4974.eurprd08.prod.outlook.com (2603:10a6:803:111::15) by PA6PR08MB10624.eurprd08.prod.outlook.com (2603:10a6:102:3d2::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6907.33; Thu, 26 Oct 2023 10:35:32 +0000 Received: from VE1PR08MB4974.eurprd08.prod.outlook.com ([fe80::a309:1d65:f5fb:436b]) by VE1PR08MB4974.eurprd08.prod.outlook.com ([fe80::a309:1d65:f5fb:436b%6]) with mapi id 15.20.6933.019; Thu, 26 Oct 2023 10:35:32 +0000 Message-ID: <94113169-710b-4088-a2d0-ad70842bb887@wolfvision.net> Date: Thu, 26 Oct 2023 12:35:29 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] dt-bindings: rtc: nxp,pcf8563: add hiz-output property Content-Language: en-US To: Alexandre Belloni Cc: Alessandro Zummo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20231024-topic-pcf85363_hiz_output-v1-0-50908aff0e52@wolfvision.net> <20231024-topic-pcf85363_hiz_output-v1-2-50908aff0e52@wolfvision.net> <20231025222327c0b5d460@mail.local> <2f17c031-30f6-4242-b2a1-1628402b3091@wolfvision.net> <1c4a6185-fe09-45d1-900a-10abf48e3fc9@wolfvision.net> <20231026005008b8255799@mail.local> <8fec6c89-548b-43b5-8361-869663a58573@wolfvision.net> <202310260956166bdcb845@mail.local> <202310261021467b56f131@mail.local> From: Javier Carrasco In-Reply-To: <202310261021467b56f131@mail.local> Content-Type: text/plain; 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Thu, 26 Oct 2023 03:36:19 -0700 (PDT) On 26.10.23 12:21, Alexandre Belloni wrote: > On 26/10/2023 12:13:23+0200, Javier Carrasco wrote: >> I want to model the INTA pin as a clock source that only should run in >> sleep mode because its clock is only used in that mode. Therefore I want >> the pin to stay in hi-Z during normal operation. > > Can you disclose what is the user of the clock, do you have a driver for > this device? > It is a Rockchip PMU through its CLK32K_IN pin. I can't disclose the exact model (yet) though, but the use case is that the PMU can run with the RTC clock connected to that pin in low-power modes. That pin is configured in the proper mode and maybe it could be configured differently with pinctrl in "default" mode, but the RTC INTA would still output the clock, which is what I want to avoid in this particular case. I just want to stop the clock at the RTC end i.e. write PIN_IO_INTA_HIZ into the PIN_IO_INTAPM. >> >> I do not want to get any interrupts from the INTA pin and the battery >> mode indication is not relevant for me either. I do not know the CCF >> mechanism in other RTCs though, but I think that the hi-Z mode >> accomplishes exactly what I described.The assumption about the battery >> mode is therefore beyond my knowledge, but my first reaction is that we >> already have the hi-Z for that. >> >> So in the end I just need a mechanism to configure INTA as hi-Z, which >> the driver still does not support. There is another application where >> the clock output is not required even though it is physically connected, >> so hi-Z is again an interesting mode and the battery mode would be >> available if it ever becomes relevant for anyone. >> >