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Date:   Thu, 26 Oct 2023 16:27:10 -0500
From:   Rob Herring <robh@kernel.org>
To:     Tao Zhang <quic_taozha@quicinc.com>
Cc:     Mathieu Poirier <mathieu.poirier@linaro.org>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Konrad Dybcio <konradybcio@gmail.com>,
        Mike Leach <mike.leach@linaro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Jinlong Mao <quic_jinlmao@quicinc.com>,
        Leo Yan <leo.yan@linaro.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        Tingwei Zhang <quic_tingweiz@quicinc.com>,
        Yuanfang Zhang <quic_yuanfang@quicinc.com>,
        Trilok Soni <quic_tsoni@quicinc.com>,
        Song Chai <quic_songchai@quicinc.com>,
        linux-arm-msm@vger.kernel.org, andersson@kernel.org
Subject: Re: [PATCH v2 7/8] dt-bindings: arm: Add support for TPDM CMB MSR
 register
Message-ID: <20231026212710.GA424453-robh@kernel.org>
References: <1698202408-14608-1-git-send-email-quic_taozha@quicinc.com>
 <1698202408-14608-8-git-send-email-quic_taozha@quicinc.com>
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On Wed, Oct 25, 2023 at 10:53:27AM +0800, Tao Zhang wrote:
> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register)
> for TPDM. It specifies the number of CMB MSR registers supported by
> the TDPM.
> 
> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
> ---
>  Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> index f9a2025..a586b80a 100644
> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
> @@ -69,6 +69,15 @@ properties:
>      minimum: 0
>      maximum: 32
>  
> +  qcom,cmb-msrs-num:
> +    description:
> +      Specifies the number of CMB MSR(mux select register) registers supported
> +      by the monitor. If this property is not configured or set to 0, it means
> +      this TPDM doesn't support CMB MSR.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 32

default: 0

> +
>    clocks:
>      maxItems: 1
>  
> @@ -124,6 +133,7 @@ examples:
>        reg-names = "tpdm-base";
>  
>        qcom,cmb-element-size = /bits/ 8 <64>;
> +      qcom,cmb-msrs-num = <32>;
>  
>        clocks = <&aoss_qmp>;
>        clock-names = "apb_pclk";
> -- 
> 2.7.4
>