Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34;
Message-ID: <5837e8e7-b7fe-48cb-bd82-c8e3f042e500@amlogic.com>
Date:   Fri, 27 Oct 2023 17:34:39 +0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH V3 RESEND] pwm: meson: add pwm support for S4
Content-Language: en-GB
To:     George Stark <gnstark@salutedevices.com>, thierry.reding@gmail.com,
        u.kleine-koenig@pengutronix.de, neil.armstrong@linaro.org,
        khilman@baylibre.com, jbrunet@baylibre.com,
        martin.blumenstingl@googlemail.com, linux-pwm@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20231016052457.1191838-1-junyi.zhao@amlogic.com>
 <10dcc778-f165-407e-b765-760d277d5e35@salutedevices.com>
From:   Junyi Zhao <junyi.zhao@amlogic.com>
In-Reply-To: <10dcc778-f165-407e-b765-760d277d5e35@salutedevices.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?MlU3RjF6YitGNzhrNk1obVRmRXBTTVFpelhlZW1NWVU0ajdBRU1hT3lRam9Z?=
 =?utf-8?B?cE1nS2ZTNk44M1gxdkZCSkE5bmZhbkx6TWd2S2I0eUVDYWp5ZkM4TGMxY2lD?=
 =?utf-8?B?US9nci9kZ05xVm9xcWZRbzNMaVd3dklYY0tLOFd5NFljRkZOdU1SOFI5ZEZy?=
 =?utf-8?B?VVdkSE9SZ1JHdjB6eVUrSU1PYnNwUTJDdHZWSnd3cXZiMVY2TmwrQSszTXRI?=
 =?utf-8?B?WEZqVUt5NHMrMnpwMURZTWlQU3lFWkhrZWsyK1pVdmxNRSt5SVI0ZG1kdEVP?=
 =?utf-8?B?OTRWd0R3ekJwbnh3c21MbUZLV0dGNXFSN1VESytvQXozUm1DN3BMeWFoTVly?=
 =?utf-8?B?RjlsbUpRNXlhVlRIZVMwQnJyczhRN0dYL1o4ZDQxK2tkOWczckFVMEdwY2pi?=
 =?utf-8?B?QWFnTDgyZ1I5SmJpZzJ4TlhkSjRYS1pYYjIzbU1zQWZsOUhKczNDcTd6Um9z?=
 =?utf-8?B?UkZoZkZNaGg5QnlQYnA5K1dkbjdUNWYxSlF6U1VVdUx6cWExeFVFMjJOSW5z?=
 =?utf-8?B?MEo1bUtFR2tGYXJ0NVowVDFZM2xVZ0dRZGY4ck1jTEJmS0x4UWdJUzJKZGVk?=
 =?utf-8?B?NXdzUCtGSTAvMmNNN25XZXd2VysyRW1EQS95RGQ5MG1qVkJqcTRNNWtkTWJz?=
 =?utf-8?B?em9GY1M2U1NReEJNckozZFBPK3c0Y2x6czBoTTQ1VW1VUktsQVFlRVRadjF2?=
 =?utf-8?B?OU5OSUMwaTluNGxLVTFtdHYxeWh4OE9lNHFhK0h0UjV0REhTKytLTHNFcU5j?=
 =?utf-8?B?cFdBemYyQkc0V0pMbjNQMERzR2ZpcjJ5bHRIM1pEbFVaeEUrOHdQeVNhSUFw?=
 =?utf-8?B?TGptR1lkSDFBQ0RUVUwrK0RFbStvSnB2NDRlVVdZV2dab0trQUFraGpJcVBx?=
 =?utf-8?B?NU1OYUtyZ3pVWTlKdUVLeFRkMTRLNlZrOEwxNU5lUENiQldNbk10NkhsWTRn?=
 =?utf-8?B?S2FqVFZpQ1lPMU9SWVdUc3NEV3JmeG45R09TS1psN0tTb2kvREZENTk2ZnJw?=
 =?utf-8?B?ek9rcWg3aTVKd25VekhCQ2hwZy9TYVRKRnVCMTVzd3ZZVkVxaklndjljc0FR?=
 =?utf-8?B?M2x1RlBFMmRYL3IwMVBsTWhjTGRGOGtEa2R6VG1hdXlHSnhqMkNKVVcrenhW?=
 =?utf-8?B?RWd3Rlh4Nk00SlB4Vm5jUTFSQ2paR2ZSbGpRcmRmZDRVeUlXQkYvQlBFOU5r?=
 =?utf-8?B?TG1KQU16Y1EzeHZ3SStQS3h5Yk1IdGdYQXVWdWxhVGlnQkdEMFMzTXlob3I5?=
 =?utf-8?B?Umx3aWRCbVo1djBkdHd2T2tnQ3FNVW1zVTBtY1NtSW1MTHV3M0poRk9RRXA3?=
 =?utf-8?B?dVJ1ZGRIYXZYRlVLNVkxUWtIT1FYd3k0LytRNTJRNXU5cHYvWm4xem1DZHlL?=
 =?utf-8?B?ckhUWnpCVWRSdHhTcVRuYlNrSEdKMENncGEzZlNhVS8yN0JEUmlISlZwbDdw?=
 =?utf-8?B?ZlFsSmgzdXVOY3JXODRNZ0t3OTBORDVnYVd0c1VKbU54N2tIOGpVYmNkYlgr?=
 =?utf-8?B?ek1JSW1oNE5mWG0rQTRzc25iUHVOcG5LM3pydHBzUVBxZFhiWkF4UGNiTkJm?=
 =?utf-8?B?aTNhQ0tSOXVzVUcwQkxpZS9DanR1UFkybEgxdGVud3V6NXc3RG45TjU4Ynpm?=
 =?utf-8?B?NTNMYkZZdUpCV0hnTW96ZXc5SkZQbFY3RVk0aWRRUDZPL2txVWdoU0J3VHpP?=
 =?utf-8?B?eGp5Z1ZaQnpWZzF5bW9tK2ljcU8yZU5uZG5kQnVCcVRGME5uWVZUd0RhSGdS?=
 =?utf-8?B?SEZiN2s0K2p0S2d5WnBkR3Fjdm1tS2ozV2lOcUlCbENMb3M2Tit5VDdHTHVo?=
 =?utf-8?B?amlHMElueUZvZ2F1eDUvZS9UQzBTVG8rdmtPaVpzZzNlSUVtOWsxdUVISS9N?=
 =?utf-8?B?ZWtHTTJPZmJ1UmE3TlV4ZCtlNjFkcVpTYlZnWUxJNGY1T09CZnNsd01qYVd5?=
 =?utf-8?B?YUlXejZZRkJRRE1qY3ZVV1FOUGN6K1g5TitkZk5ZR2gvTEdDeFVneEJGS2RR?=
 =?utf-8?B?c2J6LzRNS2hVdDB6aEp5Y29jbVFVMThiNEowRXJGQ1hXMHdaR3RLNXdjS2hD?=
 =?utf-8?B?RHcwcmpZNnl4QkpVdjN4eEtyN0Q5ZWxnWWZEd3hBdFhrWjloWlZNWXNjQ3BQ?=
 =?utf-8?Q?KprHVm0hhj2ZADJ2uXdkbZKma?=
X-OriginatorOrg: amlogic.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 74abafa0-fe84-4991-1425-08dbd6cff3e2
X-MS-Exchange-CrossTenant-AuthSource: KL1PR03MB5732.apcprd03.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2023 09:34:44.3251
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 0df2add9-25ca-4b3a-acb4-c99ddf0b1114
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: K9bUqcQflvRFJovt5KX/QC88uZV0tHABfiiGSSr6s8JPhTHq1FiGvBngT3RwmojMaPcTkD2Vp/Rsms9maJzl9Q==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PSAPR03MB5336
X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,
	DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,
	SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no
	version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Fri, 27 Oct 2023 02:35:43 -0700 (PDT)

Hi George, thank u for your review.
I will change it.

On 2023/10/24 4:07, George Stark wrote:
> [你通常不会收到来自 gnstark@salutedevices.com 的电子邮件。请访问 
> https://aka.ms/LearnAboutSenderIdentification，以了解这一点为什么很重要]
> 
> [ EXTERNAL EMAIL ]
> 
> Hello JunYi Zhao
> 
> On 10/16/23 08:24, JunYi Zhao wrote:
>> From: "junyi.zhao" <junyi.zhao@amlogic.com>
>>
>> Support PWM for S4 soc.
>> Now the PWM clock input is done in independent CLKCTRL registers.
>> And no more in the PWM registers.
>> PWM needs to obtain an external clock source.
>>
>> Signed-off-by: junyi.zhao <junyi.zhao@amlogic.com>
>> ---
>> V2 -> V3:
>> Rebase and Review the latest upstream code again.
>> After reconstruction, stick to the previous code as much as possible.
>>   drivers/pwm/pwm-meson.c | 19 +++++++++++++++++++
>>   1 file changed, 19 insertions(+)
>>
>> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
>> index 25519cddc2a9..fe9fd75747c4 100644
>> --- a/drivers/pwm/pwm-meson.c
>> +++ b/drivers/pwm/pwm-meson.c
>> @@ -99,6 +99,7 @@ struct meson_pwm_channel {
>>   struct meson_pwm_data {
>>       const char * const *parent_names;
>>       unsigned int num_parents;
>> +     unsigned int extern_clk;
> may be bool extern_clk;
>>   };
>>
>>   struct meson_pwm {
>> @@ -396,6 +397,10 @@ static const struct meson_pwm_data 
>> pwm_g12a_ao_cd_data = {
>>       .num_parents = ARRAY_SIZE(pwm_g12a_ao_cd_parent_names),
>>   };
>>
>> +static const struct meson_pwm_data pwm_s4_data = {
>> +     .extern_clk = true,
>> +};
>> +
>>   static const struct of_device_id meson_pwm_matches[] = {
>>       {
>>               .compatible = "amlogic,meson8b-pwm",
>> @@ -429,6 +434,10 @@ static const struct of_device_id 
>> meson_pwm_matches[] = {
>>               .compatible = "amlogic,meson-g12a-ao-pwm-cd",
>>               .data = &pwm_g12a_ao_cd_data
>>       },
>> +     {
>> +             .compatible = "amlogic,s4-pwm",
>> +             .data = &pwm_s4_data,
>> +     },
>>       {},
>>   };
>>   MODULE_DEVICE_TABLE(of, meson_pwm_matches);
>> @@ -451,6 +460,16 @@ static int meson_pwm_init_channels(struct 
>> meson_pwm *meson)
>>               struct clk_parent_data div_parent = {}, gate_parent = {};
>>               struct clk_init_data init = {};
>>
>> +             if (meson->data->extern_clk) {
>> +                     snprintf(name, sizeof(name), "clkin%u", i);
>> +                     channel->clk = devm_clk_get(dev, name);
>> +                     if (IS_ERR(channel->clk)) {
>> +                             dev_err(meson->chip.dev, "can't get 
>> device clock\n");
>> +                             return PTR_ERR(channel->clk);
>> +                     }
>> +                     continue;
>> +             }
>> +
>>               snprintf(name, sizeof(name), "%s#mux%u", dev_name(dev), i);
>>
>>               init.name = name;
>>
>> base-commit: 4d2c646ac07cf4a35ef1c4a935a1a4fd6c6b1a36
> 
> -- 
> Best regards
> George