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([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id r64-20020a819a43000000b00586108dd8f5sm764616ywg.18.2023.10.27.07.51.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Oct 2023 07:51:44 -0700 (PDT) Sender: Guenter Roeck Message-ID: <84252c5e-9a39-91bd-b7da-2bdea1b2aff6@roeck-us.net> Date: Fri, 27 Oct 2023 07:51:43 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Content-Language: en-US To: "Matyas, Daniel" Cc: Jean Delvare , Jonathan Corbet , "linux-hwmon@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <20231026144405.546822-1-daniel.matyas@analog.com> <20231026144405.546822-2-daniel.matyas@analog.com> From: Guenter Roeck Subject: Re: [PATCH v5 2/4] hwmon: max31827: Add support for max31828 and max31829 In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Fri, 27 Oct 2023 07:51:53 -0700 (PDT) On 10/27/23 06:00, Matyas, Daniel wrote: [ ... ] >> I also don't understand why that would be chip specific. I don't see >> anything along that line in the datasheet. >> >> Ah, wait ... I guess that is supposed to reflect the chip default. >> I don't see why the chip default makes a difference - a well defined default >> must be set either way. Again, there is no guarantee that the chip is in its >> default state when the driver is loaded. > > The well defined default was set in v4, but I deleted it, because the default value in hex for max31827 and max31828 alarm polarity, and max31827 fault queue is 0x0. I had 2 #defines for these values, but you said: > " Since MAX31827_ALRM_POL_LOW is 0, this code doesn't really do anything and just pollutes the code." > > So, I thought I should remove it altogether, since res is set to 0 in the beginning and the default value of these chips (i.e. 0) is implicitly set. > >> >> Also, why are the default values added in this patch and not in the >> previous patch ? >> > > In v4 these default values were set in the previous patch. > I asked you (or meant to ask you) to stop overwriting 0 with 0 in a variable. I didn't mean to ask you (if I did) to stop writing the default value into the chip. Sorry if I did; if so, that was a misunderstanding. Guenter