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From:   =?UTF-8?q?Kornel=20Dul=C4=99ba?= <korneld@chromium.org>
To:     Adrian Hunter <adrian.hunter@intel.com>
Cc:     linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
        Ulf Hansson <ulf.hansson@linaro.org>,
        Radoslaw Biernacki <biernacki@google.com>,
        Gwendal Grignou <gwendal@chromium.org>,
        =?UTF-8?q?Kornel=20Dul=C4=99ba?= <korneld@chromium.org>
Subject: [PATCH 2/2] mmc: sdhci-pci: Enable the clear stale TC quirk on JSL
Date:   Fri, 27 Oct 2023 14:56:10 +0000
Message-ID: <20231027145623.2258723-3-korneld@chromium.org>
In-Reply-To: <20231027145623.2258723-1-korneld@chromium.org>
References: <20231027145623.2258723-1-korneld@chromium.org>
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This patch applies the CQHCI_QUIRK_CLEAR_STALE_TC to MMC controller on
Jasper Lake platform.
When run in CQ mode, the controller on Jasper Lake sets a stale task
completion event after CQE recovery is done.

Signed-off-by: Kornel Dulęba <korneld@chromium.org>
---
 drivers/mmc/host/sdhci-pci-core.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
index 7c14feb5db77..a7e637f5cb4f 100644
--- a/drivers/mmc/host/sdhci-pci-core.c
+++ b/drivers/mmc/host/sdhci-pci-core.c
@@ -960,6 +960,12 @@ static int glk_emmc_add_host(struct sdhci_pci_slot *slot)
 
 	cq_host->mmio = host->ioaddr + 0x200;
 	cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;
+	/*
+	 * The controller on Jasper Lake signals a stale task completion
+	 * event after CQE recovery.
+	 */
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC)
+		cq_host->quirks |= CQHCI_QUIRK_CLEAR_STALE_TC;
 	cq_host->ops = &glk_cqhci_ops;
 
 	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
-- 
2.42.0.820.g83a721a137-goog