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Date:   Fri, 27 Oct 2023 14:51:34 -0700
From:   Dan Williams <dan.j.williams@intel.com>
To:     Robert Richter <rrichter@amd.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Jonathan Cameron <jonathan.cameron@huawei.com>,
        Dave Jiang <dave.jiang@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        "Vishal Verma" <vishal.l.verma@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        "Ben Widawsky" <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>
CC:     <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Terry Bowman <terry.bowman@amd.com>,
        Robert Richter <rrichter@amd.com>
Subject: RE: [PATCH v12 07/20] cxl/hdm: Use stored Component Register
 mappings to map HDM decoder capability
Message-ID: <653c30e67e848_244c8f29462@dwillia2-xfh.jf.intel.com.notmuch>
References: <20231018171713.1883517-1-rrichter@amd.com>
 <20231018171713.1883517-8-rrichter@amd.com>
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Robert Richter wrote:
> Now, that the Component Register mappings are stored, use them to
> enable and map the HDM decoder capabilities. The Component Registers
> do not need to be probed again for this, remove probing code.
> 
> The HDM capability applies to Endpoints, USPs and VH Host Bridges. The
> Endpoint's component register mappings are located in the cxlds and
> else in the port's structure. Duplicate the cxlds->reg_map in
> port->reg_map for endpoint ports.
> 
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> [rework to drop cxl_port_get_comp_map()]
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
[..]
> @@ -164,19 +144,30 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
>  	cxlhdm->port = port;
>  	dev_set_drvdata(dev, cxlhdm);
>  
> -	crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
> -	if (!crb && info && info->mem_enabled) {
> +	/* Memory devices can configure device HDM using DVSEC range regs. */
> +	if (reg_map->resource == CXL_RESOURCE_NONE) {
> +		if (!info && !info->mem_enabled) {
> +			WARN_ON(1);

This new WARN() is not documented in the changelog, it needs to be
justified as a valid reason to panic the kernel in case panic_on_warn
conservatism is being applied. Even if it could be justified on those
grounds it should be combined with the following error message as a
dev_WARN(). For now, I'll delete it.

> +			dev_err(dev, "No component registers mapped\n");
> +			return ERR_PTR(-ENXIO);
> +		}
> +