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Date:   Fri, 27 Oct 2023 15:02:06 -0700
From:   Dan Williams <dan.j.williams@intel.com>
To:     Robert Richter <rrichter@amd.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Jonathan Cameron <jonathan.cameron@huawei.com>,
        Dave Jiang <dave.jiang@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        "Vishal Verma" <vishal.l.verma@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        "Ben Widawsky" <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>
CC:     <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Terry Bowman <terry.bowman@amd.com>,
        Robert Richter <rrichter@amd.com>
Subject: RE: [PATCH v12 10/20] cxl/pci: Introduce config option PCIEAER_CXL
Message-ID: <653c335e22edc_244c8f29415@dwillia2-xfh.jf.intel.com.notmuch>
References: <20231018171713.1883517-1-rrichter@amd.com>
 <20231018171713.1883517-11-rrichter@amd.com>
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Robert Richter wrote:
> CXL error handling depends on AER.
> 
> Introduce config option PCIEAER_CXL in preparation of the AER dport
> error handling. Also, introduce the stub function
> devm_cxl_setup_parent_dport() to setup dports.
> 
> This is in preparation of follow on patches.
> 
> Note the Kconfg part of the option is added in a later patch to enable
> it once coding of the feature is complete.

This patch has no reason to exist as a standalone patch.

...will find a place to fold this in.