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[23.128.96.35]) by mx.google.com with ESMTPS id a73-20020a63904c000000b005b4c93baa41si3288044pge.391.2023.10.28.21.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Oct 2023 21:29:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="C8+/FjFH"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 68057808E8E3; Sat, 28 Oct 2023 21:29:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230161AbjJ2E2m (ORCPT + 99 others); Sun, 29 Oct 2023 00:28:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230260AbjJ2E2T (ORCPT ); Sun, 29 Oct 2023 00:28:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E82210F1; Sat, 28 Oct 2023 21:27:51 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 56370660734A; Sun, 29 Oct 2023 04:27:49 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553669; bh=XPFhkQiEs+IGnpXs/VjChiy7INWlUvumm6K55Zul0rU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C8+/FjFH44VcIQoEE5TuvkJsBmdkwjJNiQYePXC8QCQKnlodiftL7rIknTTyFaq7S Cu0VbqfW/VBEVttKYtISUXNs0PBw0jHxh04y28J7NHmrnDTS3eRdvVJx/UODNaoDMj LpET5/HJOZjm/9hjPiyDrIz2iz/NBD/NneiJNgxOj5dBZHDS3NcBPosr5mN4pAc5uF +el73KBoQd7VP+auerViiI6gWlkmB5ErUZ5+YoRVzyBU0vbPdRCAUfhWPU+Iq7Nsx7 PWGcn3za+cEF/I7zaVfxWipeZ1FgAgerFSYVvPiab548Chgqh25B2iTZfLmGAHIZ0U VI7eDOEjRiUOA== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 10/12] riscv: dts: starfive: jh7100-common: Setup gmac pinmux Date: Sun, 29 Oct 2023 06:27:10 +0200 Message-ID: <20231029042712.520010-11-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 28 Oct 2023 21:29:03 -0700 (PDT) Add pinmux configuration for the DWMAC found on the JH7100 based boards. Signed-off-by: Cristian Ciocaltea --- .../boot/dts/starfive/jh7100-common.dtsi | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi index 504c73f01f14..b556e28069c4 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -65,7 +65,83 @@ soc { }; }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins>; +}; + &gpio { + gmac_pins: gmac-0 { + gtxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <35>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + miitxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + tx-pins { + pins = , + , + , + , + , + , + , + , + ; + bias-pull-up; + drive-strength = <35>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + rxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <6>; + }; + rxer-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + rx-pins { + pins = , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + i2c0_pins: i2c0-0 { i2c-pins { pinmux =