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Sun, 29 Oct 2023 17:27:48 -0400 (EDT) From: Samuel Holland To: Lee Jones , Pavel Machek , linux-leds@vger.kernel.org, Chen-Yu Tsai , Jernej Skrabec Cc: Samuel Holland , Andre Przywara , Conor Dooley , Cristian Ciocaltea , Guo Ren , Jisheng Zhang , John Watts , Krzysztof Kozlowski , Maksim Kiselev , Marc Kleine-Budde , Palmer Dabbelt , Philipp Zabel , Rob Herring , Trevor Woerner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH v8 4/5] riscv: dts: allwinner: d1: Add LED controller node Date: Sun, 29 Oct 2023 16:26:58 -0500 Message-ID: <20231029212738.7871-5-samuel@sholland.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231029212738.7871-1-samuel@sholland.org> References: <20231029212738.7871-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 29 Oct 2023 14:28:10 -0700 (PDT) Allwinner D1 contains an LED controller. Add its devicetree node, as well as the pinmux used by the reference board design. Acked-by: Guo Ren Reviewed-by: Jernej Skrabec Tested-by: Trevor Woerner Signed-off-by: Samuel Holland --- (no changes since v5) Changes in v5: - New patch for v5 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 6 ++++++ arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 15 +++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi index b18f368e06e0..b0fb0ea377bc 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi @@ -58,6 +58,12 @@ i2c2_pb0_pins: i2c2-pb0-pins { function = "i2c2"; }; + /omit-if-no-ref/ + ledc_pc0_pin: ledc-pc0-pin { + pins = "PC0"; + function = "ledc"; + }; + /omit-if-no-ref/ uart0_pb8_pins: uart0-pb8-pins { pins = "PB8", "PB9"; diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 5a9d7f5a75b4..a476b59ba306 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -156,6 +156,21 @@ ccu: clock-controller@2001000 { #reset-cells = <1>; }; + ledc: led-controller@2008000 { + compatible = "allwinner,sun20i-d1-ledc", + "allwinner,sun50i-a100-ledc"; + reg = <0x2008000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_LEDC>; + dmas = <&dma 42>; + dma-names = "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + gpadc: adc@2009000 { compatible = "allwinner,sun20i-d1-gpadc"; reg = <0x2009000 0x400>; -- 2.41.0