Received: by 2002:a05:7412:a9a2:b0:e2:908c:2ebd with SMTP id o34csp2594630rdh; Mon, 30 Oct 2023 01:48:28 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH076Fd57HLQo3NWdYreyZ7SvOBVfiNuB7Sa1Yh4slzH2vwXws4GWpoJxdvTYxj8hA/ufwp X-Received: by 2002:a05:6a00:1a45:b0:6be:4df:2c9c with SMTP id h5-20020a056a001a4500b006be04df2c9cmr12099683pfv.28.1698655708594; Mon, 30 Oct 2023 01:48:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698655708; cv=none; d=google.com; s=arc-20160816; b=wIj0EzLMlx8NOiv9uuonR2ZGSmuI0Y6lePB+L9CejLoLcp5nNK3AZh/RnEQLfx8hCd yt4jm2UmsuProCEablQQ5u2dvaBZKkt5QEHL4dE1VEo4d8ZsweeQD7ngfSFLuAWFMOGJ /2NOuuC223djU0AVys9bzPxGH6iGHORc5zqF+XC2B9/tGq0SyYFQrEzclUkVCZHS6KQQ Nx4kNh4FdQtxtyJXD7aMjAy0kC/5IlaxyYjXbb3gFRjhdkK16BOxtWPZ8A7voS6yh5AY LQjn2qbdqOgQuAvECoq5t/vvuSeemVpxoeeiOnqCsfldTNBN0J95eTHOxQLN9nWQCPf9 xZ8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:organization:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :dkim-signature; bh=xr7IrfbX5TfGay2L7e/K2Cv2c1gmWe9rgHlEGuj0yCY=; fh=o6kVAoXObyDQMx5M3BUuC047Tpj/Ry8dBwRiq2ObBTA=; b=v5a6EJzelouAnT71GgAsvS8vQgPKmr7tvA6jQOUgQryltT3ol7ZB2WOfYwwG6/N0yx Sb8YPSXGm+CNvjWHVPc68j11++SZk7uotsw09uIxogJKN1SesJuYiYNgW9euwmBnl1Id s8i+TGW3fKMQffhcwUSl9k7HDCqhKU4cpDfPUM4yq4kdUJFtzOfvrkJw7sg7lezpURTi lnBHBpfJSLejGmUpahWMa+pE2oSSnZbvgTXCq7qEFST1qWJLdOyWoMyo9l0/ITEI33vo W35UhFea9U8iU8yHijz6pkP7jkvt+/970f81gcsZR9kmlF8Zg/lOmxfU1Wda0d3GmWb3 Zzdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=TIgKY1bu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id q21-20020a056a00085500b0068e2b901138si4671644pfk.158.2023.10.30.01.48.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 01:48:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=TIgKY1bu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 5A23380A58CD; Mon, 30 Oct 2023 01:48:26 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232069AbjJ3IsU (ORCPT + 99 others); Mon, 30 Oct 2023 04:48:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229517AbjJ3IsT (ORCPT ); Mon, 30 Oct 2023 04:48:19 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAC6D94; Mon, 30 Oct 2023 01:48:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698655696; x=1730191696; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=LS2pJUDiSTV423qSWLXmXIRDuZGAYUxp6qKMrJfujok=; b=TIgKY1buvMEgrpzxDzhdtGcbh5vQLpNEIPwcMUYWDghKiPJ5/on4tepb G/lv30pUdYEGSTsCs1hYYSSzbAt8oI4Lsca3WcRIIUCaJMrwY6wSKT+CE avGl7BKQNbkavuWtLRmcUxJ6JZe/io2eXsPMQxWtluxhHr/4cx8i+nAa+ 5O0XgePoRoHVcOq6kfoGvjzQwdY806/DulpO+QLGL6l8Z0jQyJI4tVOgF LXbDQzak+Hx4rZKxiGPijJKmb5y5uZPqDnhVNy2yG01uqP3OdT92j2e/D ZR5qaFFg5MftJ/aqb9x4s2wsk4qsj+1HJYMxQa+C2Qwe/AqkDepZs+ElS w==; X-IronPort-AV: E=McAfee;i="6600,9927,10878"; a="368251134" X-IronPort-AV: E=Sophos;i="6.03,263,1694761200"; d="scan'208";a="368251134" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2023 01:48:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10878"; a="933719934" X-IronPort-AV: E=Sophos;i="6.03,263,1694761200"; d="scan'208";a="933719934" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga005.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2023 01:48:12 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.97-RC3) (envelope-from ) id 1qxNwO-00000009mXD-2f7u; Mon, 30 Oct 2023 10:48:08 +0200 Date: Mon, 30 Oct 2023 10:48:08 +0200 From: Andy Shevchenko To: Mark Brown , Rob Herring , Frank Rowand Cc: "Stoll, Eberhard" , Miquel Raynal , Eberhard Stoll , "linux-kernel@vger.kernel.org" , "linux-spi@vger.kernel.org" , "Schrempf, Frieder" , Amit Kumar Mahapatra , Christophe JAILLET , Geert Uytterhoeven , Krishna Yarlagadda , Leonard =?iso-8859-1?Q?G=F6hrs?= , Yang Yingliang Subject: Re: AW: [PATCH 1/4] spi: Add parameter for clock to rx delay Message-ID: References: <20231026152316.2729575-1-estl@gmx.net> <20231026152316.2729575-2-estl@gmx.net> <20231027005643.4b95f17e@xps-13> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 30 Oct 2023 01:48:26 -0700 (PDT) On Fri, Oct 27, 2023 at 04:45:25PM +0100, Mark Brown wrote: > On Fri, Oct 27, 2023 at 02:46:42PM +0300, Andy Shevchenko wrote: > > > So, to me sounds like device tree source issue. I.e. you need to provide > > different DT(b)s depending on the platform (and how it should be). > > The cleanest solution (as I see not the first time people I trying quirks like > > this to be part of the subsystems / drivers) is to make DT core (OF) to have > > conditionals or boot-time modifications allowed. > > > This, what you are doing, does not scale and smells like an ugly hack. > > No, this seems like an entirely reasonable thing to have - it's just a > property of the device, we don't need to add a DT property for it, and > the maximum speed that the device can run at is going to vary depending > on the ability of the controller to control the sampling point. > > As people have been saying there's a particularly clear case for this > with SPI flash which is probed at runtime and is readily substituted at > the hardware level. So, then the question is what does DT _actually_ describes? If we have an autoprobe of something that doesn't work on platform A and works on platform B, shouldn't these platforms have to have distinguishable DTs? -- With Best Regards, Andy Shevchenko