Received: by 2002:a05:7412:a9a2:b0:e2:908c:2ebd with SMTP id o34csp2627726rdh; Mon, 30 Oct 2023 03:03:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGXOwM/zzUGgnyGh6/R3ZHdKub/kkTt8Hi4ZMhOAucR91DCafdZKpr79N4t+nfm7FlQv5zI X-Received: by 2002:a05:6358:903:b0:168:dc03:5b90 with SMTP id r3-20020a056358090300b00168dc035b90mr13212197rwi.23.1698660205492; Mon, 30 Oct 2023 03:03:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698660205; cv=none; d=google.com; s=arc-20160816; b=ePJL8C9ilEGv3FR495ohPqzAHXD4s+cLBGxtDk9uKG1dlXWpnHchVuLmt6uOIE16PD B++7Uz723hg1Je9pqqic7wHRlsULW6ShUurX4svS9uKOFsjKM2XtSTFJNOUZALatKKkr ey+7HTJaT8/3PzlEEssXh+wlkWoz+7/bBi7icKiNXhvJOuHVIxZF+5hZ9EJeh9cjWpcM nRSyjfgGND+yaUYePukalWg/uecTrqb+GMWJnqlQH1t4oPReVuutoffaiqQmVHZgdFL2 YNnyuuaxErouoUouEdrlAUPjyunSZUtk8ntOSZdAKrm9rAOWYer6yskBUiLCnFP1uywx TQTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=/67Rsh2cMjY+iuLSaYmi+i827Jcv2dBO1fcRVc0zxyY=; fh=N25l34UKybvwssildkJfWZzd7U86IAOGhJYPnp0TxMk=; b=Kjrk3RNToi896LtZt79dJAvBalC/vUE/GWwViFvlQVlZgE/uWIfcTenKd1BduuAeaQ jltOtX3R3wqKZmYrqgUidwgDgdeeYOdbhLcXeDVCwQqIAWcCnr9ID31txDpt8J6beD2c 7xB/c0bXUrWqMoTZ40nNtZR2XHzqFf+Mzpo5LzJhSPuVXk5XXM7YpSonRoPdMRVyI4Qu YKTO5gucQlZRxK2vXKM42zUtlB3WjhYtHunBhSJH/IOXML4AxZOc69WHVIbuSzA97/QE XU6M5v1+H1YmxBjTR6IaC5k0nb5E7B4NIR+o8Qk2vIjlr6LoxXpAjpOfOOvW1bDTrZeJ +fhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=YUGoBe6y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Return-Path: Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id j18-20020a635952000000b005ab7b51ab6csi4629824pgm.515.2023.10.30.03.03.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 03:03:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=YUGoBe6y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 989E38032037; Mon, 30 Oct 2023 03:03:07 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233279AbjJ3KDB (ORCPT + 99 others); Mon, 30 Oct 2023 06:03:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232940AbjJ3KBD (ORCPT ); Mon, 30 Oct 2023 06:01:03 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7CF010E7; Mon, 30 Oct 2023 03:00:35 -0700 (PDT) X-UUID: 2518fa28770b11eea33bb35ae8d461a2-20231030 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=/67Rsh2cMjY+iuLSaYmi+i827Jcv2dBO1fcRVc0zxyY=; b=YUGoBe6y4h81A4DbWe7WVW29F8xBTbRb4mMVB0itGkkCNtSb9pTlNKjS9Qr2t7yfT+YtRN15jsNeR/nfJWv1ZI9OF64liVxBEudg9kk9ZBbWbgs1sl8NIquCu7nJyQsA8HcJRrxBZ3JxQlhLvx+R/lVlAugwB0FYP5w+2Eh3esQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:841b2658-de72-444d-9b50-eedbe9b9ef07,IP:0,U RL:25,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:91c3cb94-10ce-4e4b-85c2-c9b5229ff92b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 2518fa28770b11eea33bb35ae8d461a2-20231030 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 631750122; Mon, 30 Oct 2023 18:00:24 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 30 Oct 2023 18:00:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 30 Oct 2023 18:00:23 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Matthias Brugger , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , Moudy Ho Subject: [PATCH v8 02/16] dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display Date: Mon, 30 Oct 2023 18:00:08 +0800 Message-ID: <20231030100022.9262-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231030100022.9262-1-moudy.ho@mediatek.com> References: <20231030100022.9262-1-moudy.ho@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 30 Oct 2023 03:03:07 -0700 (PDT) To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,mdp-rdma.yaml | 88 ------------------- .../bindings/media/mediatek,mdp3-rdma.yaml | 55 +++++++++--- 2 files changed, 45 insertions(+), 98 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml deleted file mode 100644 index dd12e2ff685c..000000000000 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml +++ /dev/null @@ -1,88 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MediaTek MDP RDMA - -maintainers: - - Chun-Kuang Hu - - Philipp Zabel - -description: - The MediaTek MDP RDMA stands for Read Direct Memory Access. - It provides real time data to the back-end panel driver, such as DSI, - DPI and DP_INTF. - It contains one line buffer to store the sufficient pixel data. - RDMA device node must be siblings to the central MMSYS_CONFIG node. - For a description of the MMSYS_CONFIG binding, see - Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. - -properties: - compatible: - const: mediatek,mt8195-vdo1-rdma - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - clocks: - items: - - description: RDMA Clock - - iommus: - maxItems: 1 - - mediatek,gce-client-reg: - description: - The register of display function block to be set by gce. There are 4 arguments, - such as gce node, subsys id, offset and register size. The subsys id that is - mapping to the register of display function blocks is defined in the gce header - include/dt-bindings/gce/-gce.h of each chips. - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - items: - - description: phandle of GCE - - description: GCE subsys id - - description: register offset - - description: register size - maxItems: 1 - -required: - - compatible - - reg - - power-domains - - clocks - - iommus - - mediatek,gce-client-reg - -additionalProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - soc { - #address-cells = <2>; - #size-cells = <2>; - - rdma@1c104000 { - compatible = "mediatek,mt8195-vdo1-rdma"; - reg = <0 0x1c104000 0 0x1000>; - interrupts = ; - clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; - power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; - iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; - mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 3e128733ef53..c043204cf210 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -20,8 +20,9 @@ description: | properties: compatible: - items: - - const: mediatek,mt8183-mdp3-rdma + enum: + - mediatek,mt8183-mdp3-rdma + - mediatek,mt8195-vdo1-rdma reg: maxItems: 1 @@ -49,17 +50,18 @@ properties: maxItems: 1 clocks: - items: - - description: RDMA clock - - description: RSZ clock + minItems: 1 + maxItems: 2 iommus: maxItems: 1 mboxes: - items: - - description: used for 1st data pipe from RDMA - - description: used for 2nd data pipe from RDMA + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 '#dma-cells': const: 1 @@ -68,13 +70,46 @@ required: - compatible - reg - mediatek,gce-client-reg - - mediatek,gce-events - power-domains - clocks - iommus - - mboxes - '#dma-cells' +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mdp3-rdma + + then: + properties: + clocks: + items: + - description: RDMA clock + - description: RSZ clock (shared SRAM with RDMA) + + mboxes: + items: + - description: used for 1st data pipe from RDMA + - description: used for 2nd data pipe from RDMA + + required: + - mboxes + - mediatek,gce-events + + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-vdo1-rdma + + then: + properties: + clocks: + items: + - description: RDMA clock + additionalProperties: false examples: -- 2.18.0