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Message-ID: <288bcd70-ee12-e4f7-2381-8d18e6fc0c1b@arm.com>
Date:   Mon, 30 Oct 2023 11:29:03 +0000
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Subject: Re: [PATCH v2 4/8] coresight-tpdm: Add support to configure CMB
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To:     Tao Zhang <quic_taozha@quicinc.com>
Cc:     Jinlong Mao <quic_jinlmao@quicinc.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        Tingwei Zhang <quic_tingweiz@quicinc.com>,
        Yuanfang Zhang <quic_yuanfang@quicinc.com>,
        Trilok Soni <quic_tsoni@quicinc.com>,
        Song Chai <quic_songchai@quicinc.com>,
        linux-arm-msm@vger.kernel.org, andersson@kernel.org,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Konrad Dybcio <konradybcio@gmail.com>,
        Mike Leach <mike.leach@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
References: <1698202408-14608-1-git-send-email-quic_taozha@quicinc.com>
 <1698202408-14608-5-git-send-email-quic_taozha@quicinc.com>
From:   James Clark <james.clark@arm.com>
In-Reply-To: <1698202408-14608-5-git-send-email-quic_taozha@quicinc.com>
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On 25/10/2023 03:53, Tao Zhang wrote:
> TPDM CMB subunits support two forms of CMB data set element creation:
> continuous and trace-on-change collection mode. Continuous change
> creates CMB data set elements on every CMBCLK edge. Trace-on-change
> creates CMB data set elements only when a new data set element differs
> in value from the previous element in a CMB data set. Set CMB_CR.MODE
> to 0 for continuous CMB collection mode. Set CMB_CR.MODE to 1 for
> trace-on-change CMB collection mode
> 
> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
> Signed-off-by: Jinlong Mao <quic_jinlmao@quicinc.com>
> ---
>  .../ABI/testing/sysfs-bus-coresight-devices-tpdm   | 10 +++
>  drivers/hwtracing/coresight/coresight-tpdm.c       | 71 ++++++++++++++++++++++
>  drivers/hwtracing/coresight/coresight-tpdm.h       | 12 ++++
>  3 files changed, 93 insertions(+)
> 
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> index f07218e..ace7231 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
> @@ -170,3 +170,13 @@ Contact:	Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_t
>  Description:
>  		(RW) Set/Get the MSR(mux select register) for the DSB subunit
>  		TPDM.
> +
> +What:		/sys/bus/coresight/devices/<tpdm-name>/cmb_mode
> +Date:		March 2023
> +KernelVersion	6.7
> +Contact:	Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
> +Description:	(Write) Set the data collection mode of CMB tpdm.

I know it's expanded elsewhere, but it's probably worth expanding the
CMB abbreviation here as well so people reading the docs don't have to
go into the code.

Otherwise:

Reviewed-by: James Clark <james.clark@arm.com>

> +
> +		Accepts only one of the 2 values -  0 or 1.
> +		0 : Continuous CMB collection mode.
> +		1 : Trace-on-change CMB collection mode.
> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
> index c8bb388..efb376e 100644
> --- a/drivers/hwtracing/coresight/coresight-tpdm.c
> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c
> @@ -148,6 +148,18 @@ static umode_t tpdm_dsb_is_visible(struct kobject *kobj,
>  	return 0;
>  }

[...]