Received: by 2002:a05:7412:f589:b0:e2:908c:2ebd with SMTP id eh9csp67023rdb; Tue, 31 Oct 2023 00:13:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGdmRNXyxRiDiRLH+s8sVP8URF8TVdZb0Z20xTd8GdkVFktuRZ6tp7Bj/ATaEbicX6pWf2r X-Received: by 2002:a05:6a21:2c8c:b0:17b:6ef4:68a3 with SMTP id ua12-20020a056a212c8c00b0017b6ef468a3mr7709380pzb.57.1698736409941; Tue, 31 Oct 2023 00:13:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698736409; cv=none; d=google.com; s=arc-20160816; b=KCaUicSjJ3dz35HjtaH6miDjt6CsZnC89wUfxoQ7tQ3n061HV2lBF4qYA/Js1Oudwe JRFGA8gPN0BB8QWo7jibq0UnjxTzWUsrAPD613FTS/9NeE3akAhxzVnZRSB69FwB2/wn 30ZEOckTJDRlfGw8qxiQhSabdGsYIb88jv16quS1dNwRURFN3+4+r9uVzT8OGjB5Axbm kQx0udNuwPUqwr6fD4+xx2MP44G2iPU7DnrWu1Eea7Y+UrrMMQAK7aD6bGQ23YMJPrCG YB2xXTSRTVFPsuymxP4rDbbXwk8YSRzyltPpn2LUfJM2FrmpMd8PskDe3zcScOnKAyt8 6R7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=lz/JrYs9nr5l1AHmIKtMTcqo1cI3WEmM5kXkFHdz/es=; fh=I1BoAR+h7S6+N5oVQGrbzeJSPQAaebNHNMUQ6jDz8qQ=; b=dZCRsI+SewKFby7TxL5pQ7/4q+hdf7EiMLpel8kgoLqaTy4y/Qh3Sc0bbMSiSEbvc8 t/QH174xbHCyypD5kBeuV82shNG438W2yfDrNvbaJjHSo29M3hrNW4Za3kG5y0Ocu1Jz lY0A8ArLSBaC4lN54u3RJHptiw/HrVqdEXns8CEiBYkTGGhHdtWGJQ9AV2sU7w8sp0OL /EMP1XRFJT9zugb4u9ewN3e7uNp5Cu2IS/vSzkce/6D/eRetTcLmiKU9twqrD2i4uJtj jdMqUjJCopmQtb6hRpJK+xS9Ykz89UT8ziKVfTguRu9+31S5gu8zbynsyxC66BTqDSuR McKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ix90Ubn9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id m12-20020a170902e40c00b001c61bd7cee0si595549ple.211.2023.10.31.00.13.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 00:13:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ix90Ubn9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 70D2980BC822; Tue, 31 Oct 2023 00:13:26 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343565AbjJaHNH (ORCPT + 99 others); Tue, 31 Oct 2023 03:13:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343581AbjJaHNE (ORCPT ); Tue, 31 Oct 2023 03:13:04 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB8CDF4; Tue, 31 Oct 2023 00:13:00 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39V49JJp006553; Tue, 31 Oct 2023 07:12:25 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=lz/JrYs9nr5l1AHmIKtMTcqo1cI3WEmM5kXkFHdz/es=; b=ix90Ubn9mXn9eJunRycfONNuC9A5mTbd9srEqBGvyJtnHI//c+YCyYnXwWVMGm2yjf/K 9EcyTMS03zizAtC0rovu+w/zwJ+enD2Np5EY6iCx3v6No/9Kir6NxwWxQr6Xl/lO4lr7 vydrOU341jcpZA1rD7VO4rfVM7AM2IU6YRlGX/A1ZwWo0/sOHdhg1bZfj2n8R8cG3rLv GPLb2Kdyg127CkCsAz8tukmnr5d+XZmmOtzZAYRFqOQadEpQ0ToSGY1f7sl6sfBS1myn pK25RcGuf09RlbNaCZVmKK6ybXGHPwHgD81/1NeTuFAIkQ3jQnVz8e5GxddNwlPwh8Ny tQ== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u29fetk83-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:12:24 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7COng023802 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:12:24 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:12:17 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan , Praveenkumar I Subject: [PATCH v6 2/2] cpufreq: qti: Introduce cpufreq for ipq95xx Date: Tue, 31 Oct 2023 12:41:39 +0530 Message-ID: <962f5b1f1eb34b3fa21cd063570eb06b93b2c7d2.1698735972.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: r545gbXDuPog7qUMTBMP3ke7QjVX6xG3 X-Proofpoint-ORIG-GUID: r545gbXDuPog7qUMTBMP3ke7QjVX6xG3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 spamscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 mlxlogscore=999 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310054 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Tue, 31 Oct 2023 00:13:26 -0700 (PDT) IPQ95xx SoCs have different OPPs available for the CPU based on the SoC variant. This can be determined from an eFuse register present in the silicon. Added support for ipq95xx on nvmem driver which helps to determine OPPs at runtime based on the eFuse register which has the CPU frequency limits. opp-supported-hw dt binding can be used to indicate the available OPPs for each limit. Reviewed-by: Dmitry Baryshkov Signed-off-by: Praveenkumar I Signed-off-by: Kathiravan T Signed-off-by: Varadarajan Narayanan --- v6: Rebase to top of tree v5: Merge IPQ95xx with APQ8096 case v2: Simplify bin selection by tweaking the order in dts --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 53da255..bd1e135 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -184,6 +184,7 @@ static const struct of_device_id blocklist[] __initconst = { { .compatible = "qcom,ipq6018", }, { .compatible = "qcom,ipq8064", }, { .compatible = "qcom,ipq8074", }, + { .compatible = "qcom,ipq9574", }, { .compatible = "qcom,apq8064", }, { .compatible = "qcom,msm8974", }, { .compatible = "qcom,msm8960", }, diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index 4f7af70..6355a39 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -188,6 +188,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, case QCOM_ID_IPQ5312: case QCOM_ID_IPQ5302: case QCOM_ID_IPQ5300: + case QCOM_ID_IPQ9514: + case QCOM_ID_IPQ9550: + case QCOM_ID_IPQ9554: + case QCOM_ID_IPQ9570: + case QCOM_ID_IPQ9574: drv->versions = 1 << (unsigned int)(*speedbin); break; case QCOM_ID_MSM8996SG: @@ -551,6 +556,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = { { .compatible = "qcom,ipq8064", .data = &match_data_ipq8064 }, { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 }, { .compatible = "qcom,apq8064", .data = &match_data_krait }, + { .compatible = "qcom,ipq9574", .data = &match_data_kryo }, { .compatible = "qcom,msm8974", .data = &match_data_krait }, { .compatible = "qcom,msm8960", .data = &match_data_krait }, {}, -- 2.7.4