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[87.245.175.227]) by smtp.gmail.com with ESMTPSA id d22-20020a196b16000000b0050915816a03sm205438lfa.86.2023.10.31.06.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 06:06:16 -0700 (PDT) Date: Tue, 31 Oct 2023 16:06:14 +0300 From: Serge Semin To: Jan Bottorff Cc: Jarkko Nikula , Yann Sionneau , Wolfram Sang , Yann Sionneau , Catalin Marinas , Will Deacon , Andy Shevchenko , Mika Westerberg , Jan Dabros , Andi Shyti , Philipp Zabel , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Julian Vetter , Jonathan Borne Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR Message-ID: References: <9219ad29-b9a3-4f07-81b5-43b4b6d9d178@os.amperecomputing.com> <3a305e74-2235-47ab-8564-0c594f24dc0a@os.amperecomputing.com> <1d56ceef-6573-43b9-a050-124c341a0698@linux.intel.com> <7ee0acbd-e332-4dc5-a6e6-0df58913ff71@sionneau.net> <846d933a-598f-43e7-8478-04f3a0d20d1c@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <846d933a-598f-43e7-8478-04f3a0d20d1c@linux.intel.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 31 Oct 2023 06:06:24 -0700 (PDT) On Tue, Oct 31, 2023 at 02:10:13PM +0200, Jarkko Nikula wrote: > On 10/31/23 10:44, Yann Sionneau wrote: > > > > Le 31/10/2023 ? 01:12, Jan Bottorff a ?crit?: > > > On 10/26/2023 4:18 AM, Wolfram Sang wrote: > > > > So, someone wants to come up with a patch to move to non-relaxed io > > > > accessors? > > > > > > > Is the current thinking to just make writes to DW_IC_INTR_MASK use > > > the non-relaxed variant or something more broad? > > > > > > From a safest functioning viewpoint, we talked about making all > > > accessors default to non-relaxed variants. A couple of pretty good > > > arguments from knowledgeable people favored this. I know there also > > > was some concerns about potential performance impact this might have > > > although the counter argument was this is a pretty low speed device > > > so some extra cpu cycles on register accesses were not likely to > > > degrade overall performance. > > > > > > I could make the patch if we have consensus (or maintainers > > > decision) on which way to go: 1) only writes to DW_IC_INTR_MASK are > > > non-relaxed, 2) make all read/write accessors use the non-relaxed > > > version. > > > > > > I'm personally in camp #2, safety first, performance fine tuning > > > later if needed. Latent missing barrier bugs are difficult and time > > > consuming to find. > > > > Fine with me, let's go for #2 :) > > > Also simplicity votes for #2. +1 for the option #2. Let's do it and be finally over with this patch.) -Serge(y)